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(This section was contributed by Peter Schepers and slightly edited by Marco van den Heuvel.)
These files were created for use in the PC64 emulator, written by Wolfgang Lorenz. Each one has the same layout with the filetype being stored in the DOS extension (i.e. Pxx is a PRG, Sxx is a SEQ, Uxx is a USR and Rxx is a RELative file), and the header is only 26 bytes long.
This is a dump of a Pxx file (PRG)…
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ----------------------------------------------- 0000: 43 36 34 46 69 6C 65 00 43 52 49 53 49 53 20 4D 0010: 4F 55 4E 54 41 49 4E 00 00 00
Bytes | Description |
$00-$06 | ASCII string "C64File" |
$07 | Always $00 |
$08-$17 | Filename in PETASCII, padded with $00 (not $A0, like a D64) |
$18 | Always $00 |
$19 | REL file record size ($00 if not a REL file) |
$1A-?? | Program data |
The ’xx’ in the extension of the file is usually 00, except when we have two DOS filenames which would be the same, but the C64 filenames are different! If we have two C64 filenames which are the same, they *cannot* co-exist in the same directory. If we have two files which do convert down to be the same DOS filename, the extension is incremented until an unused one is found (x01, x02, x03, up to x99). We can have up to 99 different C64 files with the same corresponding DOS names as that’s all the extension will hold (from P00 to P99).
Each PC64 file only has one entry, there are no multi-file containers allowed. This could result in a large number of these files in a directory, even for only a few programs, as each C64 file will result in a PC64 file entry. The best use for a PC64 file is a single-file program, one which does not load anything else.
This chapter is based on CRT.txt (rev1.14) compiled by Peter Schepers, with additional contributions from Per Hakan Sundell, Markus Brenner, Marco Van Den Heuvel, Groepaz.
Cartridge files were introduced in the CCS64 emulator, written by Per Hakan Sundell, and use the ".CRT" file extension. This format was created to handle the various ROM cartridges that exist, such as Action Replay, the Power cartridge, and the Final Cartridge.
Normal game cartridges can load into several different memory ranges ($8000-9FFF, $A000-BFFF or $E000-FFFF). Newer utility and freezer cartridges were less intrusive, hiding themselves until called upon, and still others used bank-switching techniques to allow much larger ROM’s than normal. Because of these "stealthing" and bank-switching methods, a special cartridge format was necessary, to let the emulator know where the cartridge should reside, the control line states to enable it and any special hardware features it uses.
Here is a dump of a sample 8KiB normal cartridge, "Attack Of The Mutant Camels"…
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 00 00 01 00 00 00 00 00 00 ...@............ 0020: 41 54 54 41 43 4B 20 4F 46 20 54 48 45 20 4D 55 ATTACK OF THE MU 0030: 54 41 4E 54 20 43 41 4D 45 4C 53 00 00 00 00 00 TANT CAMELS..... 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: D3 9B BC FE C3 C2 CD 38 30 EA EA EA A9 01 85 13 .......80....... 0060: 4C B3 9B A9 08 85 5A 88 D0 FD C6 5A D0 F9 60 D0 L.....Z....Z..`.
Bytes:$0000-000F - 16-byte cartridge signature "C64 CARTRIDGE" (padded with space characters) 0010-0013 - File header length ($00000040, in high/low format, calculated from offset $0000). The default (also the minimum) value is $40. Some cartridges exist which show a value of $00000020 which is wrong. 0014-0015 - Cartridge version (high/low, presently 01.01) 0016-0017 - Cartridge hardware type ($0000, high/low) 0 - Normal cartridge 1 - Action Replay 2 - KCS Power Cartridge 3 - Final Cartridge III 4 - Simons' BASIC 5 - Ocean type 1* 6 - Expert Cartridge 7 - Fun Play, Power Play 8 - Super Games 9 - Atomic Power 10 - Epyx Fastload 11 - Westermann Learning 12 - Rex Utility 13 - Final Cartridge I 14 - Magic Formel 15 - C64 Game System, System 3 16 - Warp Speed 17 - Dinamic** 18 - Zaxxon, Super Zaxxon (SEGA) 19 - Magic Desk, Domark, HES Australia 20 - Super Snapshot V5 21 - Comal-80 22 - Structured BASIC 23 - Ross 24 - Dela EP64 25 - Dela EP7x8 26 - Dela EP256 27 - Rex EP256 28 - Mikro Assembler 29 - Final Cartridge Plus 30 - Action Replay 4 31 - Stardos 32 - EasyFlash 33 - EasyFlash Xbank 34 - Capture 35 - Action Replay 3 36 - Retro Replay 37 - MMC64 38 - MMC Replay 39 - IDE64 40 - Super Snapshot V4 41 - IEEE-488 42 - Game Killer 43 - Prophet64 44 - EXOS 45 - Freeze Frame 46 - Freeze Machine 47 - Snapshot64 48 - Super Explode V5.0 49 - Magic Voice 50 - Action Replay 2 51 - MACH 5 52 - Diashow-Maker 53 - Pagefox 54 - Kingsoft 55 - Silverrock 128K Cartridge 56 - Formel 64 57 - RGCD 58 - RR-Net MK3 59 - EasyCalc 60 - GMod2 61 - MAX Basic 62 - GMod3 63 - ZIPP-CODE 48 64 - Blackbox V8 65 - Blackbox V3 66 - Blackbox V4 67 - REX RAM-Floppy 68 - BIS-Plus 69 - SD-BOX 70 - MultiMAX 71 - Blackbox V9 72 - Lt. Kernal Host Adaptor 73 - RAMLink 74 - H.E.R.O. 0018 - Cartridge port EXROM line status 0 - active (lo) 1 - inactive (hi) 0019 - Cartridge port GAME line status 0 - active (lo) 1 - inactive (hi) 001A - Cartridge Hardware Revision/Subtype (usually 0) 001B-001F - Reserved for future use 0020-003F - 32-byte cartridge name "CCSMON" (uppercase, padded with null characters) 0040-xxxx - Cartridge contents (called CHIP PACKETS, as there can be more than one per CRT file). See below for a breakdown of the CHIP format.
(*Note: Ocean type 1 includes Navy Seals, Robocop 2 & 3, Shadow of the Beast, Toki, Terminator 2 and more)
(**Note: Dinamic includes Narco Police and more)
The following is the contents of the CHIP packet, from position $0040 on in the CRT file. Note I have re-adjusted the starting address to be $0000, since we are now looking at a file contained in the .CRT file, and all size references are from where it starts.
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0010: D3 9B BC FE C3 C2 CD 38 30 EA EA EA A9 01 85 13 .......80....... 0020: 4C B3 9B A9 08 85 5A 88 D0 FD C6 5A D0 F9 60 D0 L.....Z....Z..`. 0030: F2 60 A9 04 85 49 A9 00 85 48 A2 00 A5 48 9D 40 .`...I...H...H.@ 0040: 03 A5 49 9D 60 03 A5 48 18 69 28 85 48 A5 49 69 ..I.`..H.i(.H.Ii 0050: 00 85 49 E8 E0 18 D0 E4 60 A6 03 A4 02 BD 40 03 ..I.....`.....@.
Bytes:$0000-0003 - Contained ROM signature "CHIP" (note there can be more than one image in a .CRT file) 0004-0007 - Total packet length ($00002010, ROM image size and header combined) (high/low format) 0008-0009 - Chip type 0 - ROM 1 - RAM, no ROM data 2 - Flash ROM 000A-000B - Bank number ($0000 - normal cartridge) 000C-000D - Starting load address (high/low format) 000E-000F - ROM image size in bytes (high/low format, typically $2000 or $4000) 0010-xxxx - ROM data
The following is a chart taken from the "Commodore Programmers Reference Guide". It details the state of various areas of memory depending on the state of the control lines.
Legend: L - ROML (low) H - ROMH (high) G - GAME E - EXROM
Addr LHGE LHGE LHGE LHGE LHGE LHGE LHGE LHGE LHGE Range 1111 101X 1000 011X 001X 1110 0100 1100 XX01 default 00X0 Ultimax ------------------------------------------------------------------------- E000-FFFF Kernal RAM RAM Kernal RAM Kernal Kernal Kernal ROMH(*) D000-DFFF IO/CHR IO/CHR IO/RAM IO/CHR RAM IO/CHR IO/CHR IO/CHR I/O C000-CFFF RAM RAM RAM RAM RAM RAM RAM RAM - A000-BFFF BASIC RAM RAM RAM RAM BASIC ROMH ROMH - 8000-9FFF RAM RAM RAM RAM RAM ROML RAM ROML ROML(*) 4000-7FFF RAM RAM RAM RAM RAM RAM RAM RAM - 1000-3FFF RAM RAM RAM RAM RAM RAM RAM RAM - 0000-0FFF RAM RAM RAM RAM RAM RAM RAM RAM RAM
(*) Internal memory does not respond to write accesses in these areas
From the above chart, the following table can be built. It shows standard cartridges, either 8KiB or 16KiB in size, and the memory ranges they load into.
Type Size Game EXRom Low Bank High Bank in K Line Line (ROML) (ROMH) ------------------------------------------------- Normal 8KiB hi lo $8000 ---- Normal 16KiB lo lo $8000 $A000 Ultimax 8KiB lo hi $E000 ----
The ROMH and ROML lines are CPU-controlled status lines, used to bank in/out RAM, ROM or I/O, depending on what is needed at the time.
Ultimax cartridges typically are situated in the $E000-FFFF (8KiB) ROM address range. There are some cartridges which only use 4KiB of the 8KiB allocation. If the cartridge is 16KiB in size, then it will reside in both $8000-9FFF and $E000-FFFF.
Size | 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 00 00 01 00 00 00 00 00 00 ...@............ 0020: 41 54 54 41 43 4B 20 4F 46 20 54 48 45 20 4D 55 ATTACK OF THE MU 0030: 54 41 4E 54 20 43 41 4D 45 4C 53 00 00 00 00 00 TANT CAMELS..... 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: D3 9B BC FE C3 C2 CD 38 30 EA EA EA A9 01 85 13 .......80.......
The second sample below is a dump of "Music Machine", a 4KiB ULTIMAX mode cartridge. It is still identified as a "standard cartridge" according to the ID.
Normal cartridge
Size | 4KiB (ULTIMAX mode) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $F000-F7FF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 00 01 00 00 00 00 00 00 00 ...@............ 0020: 4D 55 53 49 43 20 4D 41 43 48 49 4E 45 00 00 00 MUSIC MACHINE... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 10 10 00 00 00 00 F0 00 10 00 CHIP............ 0050: 3C 66 C3 C3 66 3C FF FF 18 3C 66 7E 66 66 66 00 <f..f<...<f~fff.
The third sample is a dump of "Adventure Creator", a 16KiB standard cartridge.
Normal cartridge
Size | 16KiB |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 00 00 00 00 00 00 00 00 00 ...@............ 0020: 41 64 76 65 6E 74 75 72 65 20 43 72 65 61 74 6F Adventure Creato 0030: 72 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r............... 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 09 80 81 EA C3 C2 CD 38 30 A2 00 78 D8 8E 11 D0 .......80..x....
Size | 32KiB (4 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF (all modules) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 01 00 01 00 00 00 00 00 00 ...@............ 0020: 41 63 74 69 6F 6E 20 52 65 70 6C 61 79 20 56 00 Action Replay V. 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 0C 80 C3 C2 CD 38 30 4C 60 80 4C 63 80 4C .......80L`.Lc.L
This cart has 32KiB of ROM, and 8KiB of RAM. The bank switching is done by writing to the I/O-1 range as follows:
bit meaning --- ------- 7 extra ROM bank selector (A15) (unused) 6 1 = resets FREEZE-mode (turns back to normal mode) 5 1 = enable RAM at ROML ($8000-$9FFF) & I/O-2 ($DF00-$DFFF = $9F00-$9FFF) 4 ROM bank selector high (A14) 3 ROM bank selector low (A13) 2 1 = disable cartridge (turn off $DE00) 1 1 = /EXROM high 0 1 = /GAME low
Additionally the RAM or ROM can be available through a window in the I/O-2 range.
Size | 16KiB (2 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | module #1 - $8000-9FFF module #2 - $A000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 20 01 00 00 02 00 00 00 00 00 00 00 00 ... ............ 0020: 4B 43 53 20 50 6F 77 65 72 20 43 61 72 74 72 69 KCS Power Cartri 0030: 64 67 65 00 00 00 00 00 00 00 00 00 00 00 00 00 dge............. 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 5E FE C3 C2 CD 38 30 78 D8 A2 FF 9A A9 27 ..^....80x.....' … 2050: 43 48 49 50 00 00 20 10 00 00 00 00 A0 00 20 00 CHIP.. ....... . 2060: 97 E3 16 A1 FF FF FF 20 13 A0 A5 01 09 01 85 01 ....... ........
Size | 64KiB (4 banks of 16KiB each) |
EXROM | inactive (hi) (1) |
GAME | inactive (hi) (1) |
Load address | $8000-BFFF (all modules) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 03 00 00 00 00 00 00 00 00 ...@............ 0020: 46 69 6E 61 6C 20 43 61 72 74 72 69 64 67 65 20 Final Cartridge 0030: 49 49 49 20 31 39 38 37 00 00 00 00 00 00 00 00 III 1987........ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 09 80 5E FE C3 C2 CD 38 30 4C 4C 80 4C 55 95 4C ..^....80LL.LU.L … 4050: 43 48 49 50 00 00 40 10 00 00 00 01 80 00 40 00 CHIP..@.......@. 4060: 01 02 00 81 5D 81 61 81 99 81 D8 81 0B 82 33 82 ....].a.......3. … 8060: 43 48 49 50 00 00 40 10 00 00 00 02 80 00 40 00 CHIP..@.......@. 8070: 20 43 80 20 52 80 A9 4E 20 05 DE 20 FD BF AD 39 C. R..N .. ...9 … C070: 43 48 49 50 00 00 40 10 00 00 00 03 80 00 40 00 CHIP..@.......@. C080: A2 06 BD DD 85 95 05 CA 10 F8 AE A0 02 E8 EC A2 ................
A total of 64 KiB of ROM memory is organized into four $4000 banks located at $8000-$BFFF.
The banks are arranged in the following way:
Bank 0: BASIC, Monitor, Disk-Turbo Bank 1: Notepad, BASIC (Menu Bar) Bank 2: Desktop, Freezer/Print Bank 3: Freezer, Compression
The cartridges uses the entire I/O-1 and I/O-2 range. Bank switching is done by writing the bank number plus $40 into memory location $DFFF. For instance, to select bank 2, $DFFF is set to $42.
The CRT file contains four CHIP blocks, each block with a start address of $8000, length $4000 and the bank number in the bank field. In the cartridge header, both EXROM ($18) and GAME ($19) are set to 1 to enable the 16 KiB ROM configuration.
The registers are arranged in the following way:
One register at $DFFF:
bit meaning --- ------- 7 Hide this register (1 = hidden) 6 NMI line (0 = low = active) *1) 5 GAME line (0 = low = active) *2) 4 EXROM line (0 = low = active) 2-3 unassigned (usually set to 0) 0-1 number of bank to show at $8000
1) if either the freezer button is pressed, or bit 6 is 0, then an NMI is generated
2) if the freezer button is pressed, GAME is also forced low
The rest of I/O-1/I/O-2 contain a mirror of the last 2 pages of the currently selected ROM bank (also at $dfff, contrary to what some other documents say)
Size | 16KiB (2 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | module #1 - $8000-9FFF module #2 - $A000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 04 00 00 00 00 00 00 00 00 ...@............ 0020: 53 69 6D 6F 6E 27 73 20 42 61 73 69 63 00 00 00 Simon's Basic... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 52 81 52 81 C3 C2 CD 38 30 41 4C 52 81 20 2C 81 R.R....80ALR. ,. … 2050: 43 48 49 50 00 00 20 10 00 00 00 00 A0 00 20 00 CHIP.. ....... . 2060: 20 A4 A6 99 9E CB A0 05 A5 A8 91 20 A4 A6 99 A2 .......... ....
Simons’ BASIC permanently uses 16 KiB ($4000) bytes of cartridge memory from $8000-$BFFF. However, through some custom bank-switching logic the upper area ($A000-$BFFF) may be disabled so Simons’ BASIC may use it as additional RAM. Writing a value of $01 to address location $DE00 banks in ROM, $00 disables ROM and enables RAM.
The CRT file contains two CHIP blocks of length $2000 each, the first block having a start address of $8000, the second block $A000. In the cartridge header, EXROM ($18) is set to 0, GAME ($19) is set to 1 to indicate the RESET/power-up configuration of 8 KiB ROM.
Size | 32KiB, 128KiB, 256KiB or 512KiB sizes (4, 16, 32 or 64 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | Banks 00-15 - $8000-9FFF Banks 16-31 - $A000-BFFF (except Terminator 2) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 00000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 00010: 00 00 00 40 01 00 00 05 00 00 00 00 00 00 00 00 ...@............ 00020: 53 48 41 44 4F 57 20 4F 46 20 54 48 45 20 42 45 SHADOW OF THE BE 00030: 41 53 54 00 00 00 00 00 00 00 00 00 00 00 00 00 AST............. 00040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 00050: 09 80 83 81 C3 C2 CD 38 30 4C 83 81 4C 76 82 80 .......80L..Lv.. … 02050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 02060: 59 6D 00 56 AD 00 55 AE F0 00 01 A0 FE 00 01 F8 Ym.V..U......... … 20140: 43 48 49 50 00 00 20 10 00 00 00 10 A0 00 20 00 CHIP.. ....... . 20150: 0A 9A 55 FF 9B 69 57 FE AA 65 96 FE 65 0F D6 D9 ..U..iW..e..e...
Here is a list of the known OCEAN cartridges:
Batman The Movie (128 KiB) Battle Command (128 KiB) Double Dragon (128 KiB) Navy Seals (128 KiB) Pang (128 KiB) Robocop 3 (128 KiB) Space Gun (128 KiB) Toki (128 KiB) Chase H.Q. II (256 KiB) Robocop 2 (256 KiB) Shadow of the Beast (256 KiB) Terminator 2 (512 KiB)
The 32KiB type of cart has 4 banks of 8KiB ($2000), banked in at $8000-$9FFF.
The 128KiB type of cart has 16 banks of 8KiB ($2000), banked in at $8000-$9FFF.
The 256KiB type of cart has 32 banks of 8KiB ($2000), 16 banked in at $8000-$9FFF, and 16 banked in at $A000-$BFFF.
The 512KiB type of cart has 64 banks of 8KiB ($2000), banked in at $8000-$9FFF.
Bank switching is done by writing to $DE00. The lower six bits give the bank number (ranging from 0-63). Bit 7 in this selection word is always set.
Size | 8KiB |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 06 01 00 00 00 00 00 00 00 ...@............ 0020: 45 78 70 65 72 74 20 43 61 72 74 72 69 64 67 65 Expert Cartridge 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 02 00 00 80 00 20 00 CHIP..@....... . 0050: 00 00 00 0A F3 00 00 00 00 00 00 00 00 00 00 00 ................
Size | 128KiB (16 banks of 8KiB modules) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF (all modules) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 00000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 00010: 00 00 00 40 01 00 00 07 00 01 00 00 00 00 00 00 ...@............ 00020: 46 55 4E 20 50 4C 41 59 00 00 00 00 00 00 00 00 FUN PLAY........ 00030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 00050: 1E 80 86 EA C3 C2 CD 38 30 1B 00 81 0D 08 80 00 .......80....... … 02050: 43 48 49 50 00 00 20 10 00 00 00 08 80 00 20 00 CHIP.. ....... . 02060: 78 A2 F0 86 01 BD 1D 08 9D F8 00 CA D0 F7 4C 00 x.............L. … 04060: 43 48 49 50 00 00 20 10 00 00 00 10 80 00 20 00 CHIP.. ....... . 04070: 38 E5 68 85 03 B0 11 27 03 12 C0 18 69 27 42 90 8.h....'....i'B. … 06070: 43 48 49 50 00 00 20 10 00 00 00 18 80 00 20 00 CHIP.. ....... . 06080: 44 D0 5E 06 02 C0 44 11 40 04 11 44 01 5F 1C 73 D.^...D.@..D._.s … 1E130: 43 48 49 50 00 00 20 10 00 00 00 39 80 00 20 00 CHIP.. ....9.. . 1E140: 85 EB 41 EA 9E 08 03 00 C0 06 18 01 00 C0 08 03 ..A.............
The FUN PLAY Cartridge uses $DE00 for bank selection, and uses 8KiB banks ($2000) at $8000-$9FFF. There are 16 banks of ROM memory and are referenced by the following values:
$00 -> Bank 0 $08 -> Bank 1 $10 -> Bank 2 $18 -> Bank 3 $20 -> Bank 4 $28 -> Bank 5 $30 -> Bank 6 $38 -> Bank 7 $01 -> Bank 8 $09 -> Bank 9 $11 -> Bank 10 $19 -> Bank 11 $21 -> Bank 12 $29 -> Bank 13 $31 -> Bank 14 $39 -> Bank 15
The bank field in the chip headers is set according to the value written to $DE00. The following bits are used for bank decoding in $DE00 (0 being the LSB, 3 being the MSB).
Bit# 76543210 xx210xx3
After copying memory from the ROM banks, the selection program writes a value of $86 to $DE00. This seems either to reset or disable the cartridge ROM.
Size | 64KiB (4 banks of 16KiB each) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Startup mode | 16KiB game |
Load address | $8000-BFFF (all modules) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 08 00 00 00 00 00 00 00 00 ...@............ 0020: 53 55 50 45 52 20 47 41 4D 45 53 00 00 00 00 00 SUPER GAMES..... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 0A 80 0A 80 C3 C2 CD 38 30 00 A9 80 A0 00 85 FB .......80....... … 4050: 43 48 49 50 00 00 40 10 00 00 00 01 80 00 40 00 CHIP..@.......@. 4060: 27 80 A8 80 C3 C2 CD 38 30 00 40 C0 40 C0 40 C0 '......80.@.@.@. … 8060: 43 48 49 50 00 00 40 10 00 00 00 02 80 00 40 00 CHIP..@.......@. 8070: 00 00 00 49 4D C7 64 47 46 45 F3 48 DC 08 7E 0B ...IM.dGFE.H..~. … C070: 43 48 49 50 00 00 40 10 00 00 00 03 80 00 40 00 CHIP..@.......@. C080: D5 F9 F0 C1 D5 F7 F0 BD E8 B5 02 F0 FB C9 05 30 ...............0
The Super Games cartridge uses 4 16KiB banks ($8000-$BFFF) of ROM memory. Bank selecting is done by writing to $DF00.
$DF00 register is as follows:
bit meaning --- ------- 0 bank bit 0 1 bank bit 1 2 mode (0 = EXROM/GAME (bridged on the same wire - 16KiB config) 1 = cartridge disabled) 3 write-protect-latch (1 = no more changes are possible until the next hardware-reset ) 4-7 unused
Size | 32KiB (4 banks of 8KiB modules) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF (all modules) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 09 00 01 00 00 00 00 00 00 ...@............ 0020: 41 74 6F 6D 69 63 20 50 6F 77 65 72 00 00 00 00 Atomic Power.... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 0C 80 C3 C2 CD 38 30 4C 41 80 4C 1E 80 4C .......80LA.L..L … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 09 80 0C 80 C3 C2 CD 38 30 4C 3F 80 4C 91 80 4C .......80L?.L..L … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 4070: EF FC 09 80 C3 C2 CD 38 30 4C 27 80 4C DB 81 4C .......80L'.L..L … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 6080: 09 80 0C 80 C3 C2 CD 38 30 4C 73 86 4C 30 80 4C .......80Ls.L0.L
This cart has 32KiB of ROM and 8KiB of RAM
Writing to I/O-1 will do the following:
bit meaning --- ------- 7 extra ROM bank selector (A15) (unused) 6 1 = resets FREEZE-mode (turns back to normal mode) 5 1 = enable RAM at ROML ($8000-$9FFF) & I/O-2 ($DF00-$DFFF = $9F00-$9FFF) 4 ROM bank selector high (A14) 3 ROM bank selector low (A13) 2 1 = disable cartridge (turn off $DE00) 1 1 = /EXROM high 0 1 = /GAME low
If bit 5 (RAM enable) is 1, bit 0,1 (exrom/game) is == 2 (cart off), bit 2,6,7 (cart disable, freeze clear) are 0, then cart ROM (Bank 0..3) is mapped at 8000-9FFF, and cart RAM (Bank 0) is mapped at A000-BFFF and cart RAM (Bank 0) is is enabled in the I/O-2 area using 16KiB game config.
The cart RAM or ROM is available through a window in the I/O-2 range.
Size | 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 0A 00 01 00 00 00 00 00 00 ...@............ 0020: 45 50 59 58 20 46 41 53 54 4C 4F 41 44 00 00 00 EPYX FASTLOAD... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 30 80 5E FE C3 C2 CD 38 30 20 04 90 4C 38 DF AB 0.^....80 ..L8..
The Epyx FastLoad cart uses a simple capacitor to toggle the ROM on and off:
the capacitor is discharged, and 8KiB game config enabled, by either reading ROML or reading I/O-1. If none of those accesses happen the capacitor will charge, and if it is charged (after 512 cycles) then the ROM will get disabled.
Size | 16KiB |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 0B 00 00 00 00 00 00 00 00 ...@............ 0020: 57 45 53 54 45 52 4D 41 4E 4E 00 00 00 00 00 00 WESTERMANN...... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 40 00 CHIP.. .......@. 0050: 09 80 9C 80 C3 C2 CD 38 30 A2 00 8E 16 D0 20 84 .......80..... .
Any read from the I/O-2 range will switch the cart off.
Size | 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 0C 00 01 00 00 00 00 00 00 ...@............ 0020: 52 45 58 00 00 00 00 00 00 00 00 00 00 00 00 00 REX............. 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 08 80 C1 FE C3 C2 CD 38 30 6C 95 E3 20 A3 FD 20 .......80l.. ..
Reading from $DF00-DFBF disables ROM, reading from $DFC0-DFFF enables ROM (8KiB game config).
Size | 16KiB |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 0D 00 00 00 00 00 00 00 00 ...@............ 0020: 54 68 65 20 46 69 6E 61 6C 20 43 61 72 74 72 69 The Final Cartri 0030: 64 67 65 20 49 00 00 00 00 00 00 00 00 00 00 00 dge I........... 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 80 BA 5E FE C3 C2 CD 38 30 00 A0 A0 20 2D FE 58 ..^....80... -.X
Any access to I/O-1 turns cartridge ROM off. Any access to I/O-2 turns cartridge ROM on.
The cart ROM is visible in I/O-1 and I/O-2.
Size | 64KiB (8 banks of 8KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load Address | $E000-FFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 0E 01 00 00 00 00 00 00 00 ...@............ 0020: 4D 61 67 69 63 20 46 6F 72 6D 65 6C 00 00 00 00 Magic Formel.... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 E0 00 20 00 CHIP.. ....... . 0050: 4D 46 30 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D MF0...`...`...`. … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 E0 00 20 00 CHIP.. ....... . 2060: 4C 5F E4 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D L_....`...`...`. … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 E0 00 20 00 CHIP.. ....... . 4070: 4D 46 32 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D MF2...`...`...`. … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 E0 00 20 00 CHIP.. ....... . 6080: 4D 46 33 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D MF3...`...`...`. … 8080: 43 48 49 50 00 00 20 10 00 00 00 04 E0 00 20 00 CHIP.. ....... . 8090: 4D 46 34 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D MF4...`...`...`. … A090: 43 48 49 50 00 00 20 10 00 00 00 05 E0 00 20 00 CHIP.. ....... . A0A0: 4D 46 35 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D MF5...`...`...`. … C0A0: 43 48 49 50 00 00 20 10 00 00 00 06 E0 00 20 00 CHIP.. ....... . C0B0: 4D 46 36 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D MF6...`...`...`. … E0B0: 43 48 49 50 00 00 20 10 00 00 00 07 E0 00 20 00 CHIP.. ....... . E0C0: 4D 46 37 8D 00 DF 60 8D 01 DF 60 8D 02 DF 60 8D MF7...`...`...`.
Size | 512KiB (64 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF (all modules) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 00000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 00010: 00 00 00 40 01 00 00 0F 00 01 00 00 00 00 00 00 ...@............ 00020: 43 36 34 47 53 20 43 61 72 74 72 69 64 67 65 00 C64GS Cartridge. 00030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 00050: 6D 80 C5 80 C3 C2 CD 38 30 4C CB 80 4C 36 84 4C m......80L..L6.L … 02050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 02060: 18 D0 A9 FF 8D 15 D0 8D 1D D0 8D 17 D0 A2 07 A9 ................ … 04060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 04070: E0 08 19 21 77 84 52 98 9F 80 A5 21 31 01 31 89 ...!w.R....!1.1. … 06070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 06080: C0 08 1C 1D A0 92 03 03 D8 AA 04 C0 B8 01 40 EA ..............@. … 7E430: 43 48 49 50 00 00 20 10 00 00 00 3F 80 00 20 00 CHIP.. ....?.. . 7E440: 45 20 41 20 42 49 47 20 58 FE 4F 4E 20 54 48 49 E A BIG X.ON THI
Here is a list of the known cartridges:
C64GS 4-in-1 (Commodore) (512 KiB) Last Ninja Remix (System 3) (512 KiB) Myth (System 3) (512 KiB)
ROM memory is organized in 8KiB ($2000) banks located at $8000-$9FFF. Bank switching is done by writing to address $DE00+X, where X is the bank number (STA $DE00,X). For instance, to read from bank 3, address $DE03 is written to. Reading from anywhere in the I/O-1 range will disable the cart.
The CRT file contains a string of CHIP blocks, each block with a start address of $8000, length $2000 and the bank number in the bank field. In the cartridge header, EXROM ($18) is set to 0, GAME ($19) is set to 1 to enable the 8 KiB ROM configuration.
Size | 16KiB |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 10 00 00 00 00 00 00 00 00 ...@............ 0020: 57 61 72 70 73 70 65 65 64 00 00 00 00 00 00 00 Warpspeed....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 4C 22 80 4C 22 80 FF 43 42 4D 20 53 E4 20 18 E5 L".L"..CBM S. ..
After RESET or POWER ON, 16KiB of cartridge ROM is visible at $8000-$BFFF. Additionally, ROM normally located at $9E00-$9FFF is mirrored into I/O-1 and I/O-2 at $DE00-$DFFF. ROM at $8000-$BFFF is disabled by writing into the I/O-2 area (typically $DF00) and may be re-enabled by writing into I/O-1 ($DE00). However, the $DE00-$DFFF (I/O-1/I/O-2) area itself always remains mapped to cartridge ROM.
Size | 128KiB (16 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF (all modules) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 00000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 00010: 00 00 00 40 01 00 00 11 00 01 00 00 00 00 00 00 ...@............ 00020: 4E 61 72 63 6F 20 50 6F 6C 69 63 65 00 00 00 00 Narco Police.... 00030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 00050: 0B 80 0B 80 C3 C2 CD 38 30 00 00 78 A2 FF 9A D8 .......80..x.... .. 02050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 02060: 1C 8C 1B 8C 16 16 8F 16 16 88 1C 1C 86 1C 1C 89 ................ .. 04060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 04070: B6 02 07 08 07 07 00 0A 0A B6 00 05 0A 00 07 07 ................ .. 1E130: 43 48 49 50 00 00 20 10 00 00 00 0F 80 00 20 00 CHIP.. ....... . 1E140: 00 D5 70 03 F5 70 0F 5F 70 0F F7 70 35 FD F0 37 ..p..p._p..p5..7
Here is a list of the known DINAMIC cartridges:
Narco Police (128 KiB) Satan (128 KiB)
ROM memory is organized in 8KiB ($2000) banks located at $8000-$9FFF. Bank switching is done by reading from address $DE00+X, where X is the bank number (LDA $DE00,X). For instance, to read from bank 3, address $DE03 is accessed.
The CRT file contains a string of CHIP blocks, each block with a start address of $8000, length $2000 and the bank number in the bank field. In the cartridge header, EXROM ($18) is set to 0, GAME ($19) is set to 1 to enable the 8 KiB ROM configuration.
Size | 20KiB (3 banks of different sizes) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-8FFF (mirrored in $9000-9FFF, module 0, chip U1) $A000-BFFF (banked modules 1 and 2, chip U2) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 12 00 00 00 00 00 00 00 00 ...@............ 0020: 5A 61 78 78 6F 6E 00 00 00 00 00 00 00 00 00 00 Zaxxon.......... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 10 10 00 00 00 00 80 00 10 00 CHIP............ 0050: 0D 80 29 80 C3 C2 CD 38 30 78 4C 09 80 78 A9 00 ..)....80xL..x.. .. 1050: 43 48 49 50 00 00 20 10 00 00 00 00 A0 00 20 00 CHIP.. ....... . 1060: A2 0F BD 00 20 D0 04 CA 10 F8 60 BD 70 20 F0 0D .... .....`.p .. .. 3060: 43 48 49 50 00 00 20 10 00 00 00 01 A0 00 20 00 CHIP.. ....... . 3070: 65 A2 36 A3 E7 A3 CB A4 94 A5 86 A6 5E A7 35 A8 e.6.........^.5.
The (Super) Zaxxon carts use a 4KiB ($1000) ROM at $8000-$8FFF (mirrored in $9000-$9FFF) along with two 8KiB ($2000) cartridge banks located at $A000-$BFFF. One of the two banks is selected by doing a read access to either the $8000-$8FFF area (bank 0 is selected) or to $9000-$9FFF area (bank 1 is selected). EXROM ($18 = $00) and GAME ($19 = $00) lines are always pulled to GND to select the 16 KiB ROM configuration.
The CRT file includes three CHIP blocks:
a) bank = 0, load address = $8000, size = $1000 b) bank = 0, load address = $A000, size = $2000 c) bank = 1, load address = $A000, size = $2000
Size | 32KiB, 64KiB or 128KiB sizes (4 to 16 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | (banks 00-15) - $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 13 00 01 00 00 00 00 00 00 ...@............ 0020: 4D 61 67 69 63 20 44 65 73 6B 00 00 00 00 00 00 Magic Desk...... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 C6 CA C3 C2 CD 38 30 8E 16 D0 20 A3 FD 20 .......80... .. .. 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 00 3F 0A 01 00 86 4E 24 28 31 30 29 3A 4A 4F 59 .?....N$(10):JOY .. 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 4070: 00 8B C9 28 4E 24 2C 31 29 B3 B1 22 FF 22 A7 32 ...(N$,1)..".".2 .. 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 6080: AE 01 83 33 2C 37 2C 22 32 29 20 44 45 4C 20 4B ...3,7,"2) DEL K
This cartridge type is very similar to the OCEAN cart type: ROM memory is organized in 8KiB ($2000) banks located at $8000-$9FFF. Bank switching is done by writing the bank number to $DE00. Deviant from the Ocean type, bit 7 is cleared for selecting one of the ROM banks. If bit 7 is set ($DE00 = $80), the GAME/EXROM lines are disabled, turning on RAM at $8000-$9FFF instead of ROM.
In the cartridge header, EXROM ($18) is set to 0, GAME ($19) is set to 1 to indicate the RESET/power-up configuration of 8 KiB ROM.
Here is a list of the known cartridges:
Ghosbusters (HES Australia) (32 KiB) Magic Desk (Commodore) (32 KiB) Badlands (Domark) (64 KiB) Vindicators (Domark) (64 KiB) Wonderboy (HES Australia) (64 KiB) Cyberball (Domark) (128 KiB)
Size | 64KiB (4 banks of 16KiB each) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 14 00 00 00 00 00 00 00 00 ...@............ 0020: 53 75 70 65 72 20 53 6E 61 70 73 68 6F 74 20 35 Super Snapshot 5 0030: 20 4E 54 53 43 00 00 00 00 00 00 00 00 00 00 00 NTSC........... 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 09 80 59 80 C3 C2 CD 38 30 20 03 9F 00 FA F4 20 ..Y....80 ..... … 4050: 43 48 49 50 00 00 40 10 00 00 00 01 80 00 40 00 CHIP..@.......@. 4060: 79 DE BC FE C3 C2 CD 38 30 A9 05 8D 20 D0 8D 21 y......80... ..! … 8060: 43 48 49 50 00 00 40 10 00 00 00 02 80 00 40 00 CHIP..@.......@. 8070: 50 DE BC FE C3 C2 CD 38 30 A9 0A 85 6A A9 0D 85 P......80...j... … C070: 43 48 49 50 00 00 40 10 00 00 00 03 80 00 40 00 CHIP..@.......@. C080: 50 DE BC FE C3 C2 CD 38 30 85 07 20 1A AD A5 76 P......80.. ...v
The first page of the currently selected ROM bank is mirrored in the I/O-1 range when reading.
The control Register is the I/O-1 range when writing:
bit meaning --- ------- 7-5 unused 4 ROM/RAM bank bit 1 3 ROM enable 2 ROM/RAM bank bit 0 1 RAM enable, EXROM 0 release freeze, !GAME
Size | 64KiB (4 banks of 16KiB each) |
EXROM | active (low) (0) |
GAME | active (low) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 15 00 00 00 00 00 00 00 00 ...@............ 0020: 43 6F 6D 61 6C 20 38 30 00 00 00 00 00 00 00 00 Comal 80........ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 87 87 70 CF C3 C2 CD 38 30 4C AA CF 4C 70 CF 4C ..p....80L..Lp.L … 4050: 43 48 49 50 00 00 40 10 00 00 00 01 80 00 40 00 CHIP..@.......@. 4060: AA CF 70 CF C3 C2 CD 38 30 01 29 01 28 01 2C 04 ..p....80.).(.,. … 8060: 43 48 49 50 00 00 40 10 00 00 00 02 80 00 40 00 CHIP..@.......@. 8070: AA CF 70 CF C3 C2 CD 38 30 91 92 92 92 92 92 92 ..p....80....... … C070: 43 48 49 50 00 00 40 10 00 00 00 03 80 00 40 00 CHIP..@.......@. C080: 7B C8 7E C8 C3 C2 CD 38 30 43 4F 4D 41 4C 80 93 {.~....80COMAL..
The Comal-80 Cartridge uses 16KiB banks ($4000) at $8000-$BFFF. There are 4 banks of ROM memory and the cart has 1 (write-only) bank control register which is located at $DE00 and mirrored throughout the $DE00-$DEFF range.
bit meaning --- ------- 7 exrom? 6 game? 5 unknown function (used by the software to disable the cartridge) 4 unused? 3 unused? 2 unknown function (used by the software however) 0-1 selects bank
Size | 16KiB (2 banks of 8KiB each) |
EXROM | inactive (hi) (1) |
GAME | active (0) |
Load address | $8000-9FFF |
No sample data/file available.
IF YOU OWN THIS TYPE OF CARTRIDGE AND/OR CAN PROVIDE A ROM IMAGE, PLEASE GET IN TOUCH WITH US!
Any read/write access to $DE00 or $DE01 will switch in bank 0. Any read/write access to $DE02 will switch in bank 1. Any read/write access to $DE03 will switch off EXROM.
Size | 16KiB or 32KiB sizes (1 or 2 banks of 16KiB each) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 17 00 00 00 00 00 00 00 00 ...@............ 0020: 52 6F 73 73 20 31 34 00 00 00 00 00 00 00 00 00 Ross 14......... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 09 80 09 80 C3 C2 CD 38 30 A2 00 BD 20 80 4D 0E .......80... .M. … 4050: 43 48 49 50 00 00 40 10 00 00 00 01 80 00 40 00 CHIP..@.......@. 4060: 3F 5A 4D 4D 50 4D 8D 25 3F 1A 1F 77 3F CD E0 3F ?ZMMPM.%?..w?..?
Any read access to $DE00 will switch in bank 1 (if cart is 32KiB). Any read access to $DF00 will switch off EXROM and GAME.
Size | 8KiB to 72KiB sizes (1 to 9 banks of 8KiB each, or 1 bank of 8KiB and 1 or 2 banks of 32KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 18 00 01 00 00 00 00 00 00 ...@............ 0020: 44 45 4C 41 20 45 50 36 34 00 00 00 00 00 00 00 DELA EP64....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 00 85 5E FE C3 C2 CD 38 30 FF FF FF FF FF FF FF ..^....80....... … 2050: 43 48 49 50 00 00 80 10 00 00 00 01 80 00 80 00 CHIP............ 2060: 54 45 53 54 0D 2A 0D 54 45 20 36 34 0D 00 00 00 TEST.*.TE 64....
This is an eprom cartridge. It has 1 2764 (8KiB) which holds the base eprom with the base menu, and 2 27256 eproms of which 8KiB parts are banked into the $8000-9FFF area.
The bank selecting is done by writing to $DE00. The following bits are used for bank decoding in $DE00 (0 being the LSB, 3 being the MSB).
Bit# 76543210 xx10xx32
Any bank value below 4 or above 11 switches in the base bank (bank 0).
The bit values for each eprom bank are :
eprom bank 1 : xx00xx01 eprom bank 2 : xx01xx01 eprom bank 3 : xx10xx01 eprom bank 4 : xx11xx01 eprom bank 5 : xx00xx10 eprom bank 6 : xx01xx10 eprom bank 7 : xx10xx10 eprom bank 8 : xx11xx10
Setting bit 7 high will switch off EXROM.
Size | 8KiB to 64KiB sizes (1 to 8 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 19 00 01 00 00 00 00 00 00 ...@............ 0020: 44 45 4C 41 20 45 50 37 78 38 00 00 00 00 00 00 DELA EP7x8...... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 5E FE C3 C2 CD 38 30 78 A2 FF 9A D8 8E 16 ..^....80x...... … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 94 83 A0 83 C3 C2 CD 38 30 02 BB 5A 30 5F EE 3D .......80..Z0_.=
This is an eprom cartridge. It has 8 8KiB banks of which the first holds the base menu, the other eproms can be banked into the $8000-9FFF area.
The bank selecting is done by writing to $DE00. Each low bit is used to bank in the respective eprom. If all bits are high then the EXROM is switched off.
The bit values for each eprom bank is:
eprom bank 1 : 11111110 ($FE) (base eprom) eprom bank 2 : 11111101 ($FD) eprom bank 3 : 11111011 ($FB) eprom bank 4 : 11110111 ($F7) eprom bank 5 : 11101111 ($EF) eprom bank 6 : 11011111 ($DF) eprom bank 7 : 10111111 ($BF) eprom bank 8 : 01111111 ($7F) EXROM off : 11111111 ($FF)
Size | 8KiB to 262KiB sizes (1 to 33 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 1A 00 01 00 00 00 00 00 00 ...@............ 0020: 44 45 4C 41 20 45 50 32 35 36 00 00 00 00 00 00 DELA EP256...... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 00 85 5E FE C3 C2 CD 38 30 93 0D 2B 2B 2B 20 45 ..^....80..+++ E … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 09 80 28 80 C3 C2 CD 38 30 78 A2 05 8E 16 D0 20 ..(....80x..... … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 4070: 0B 80 BC FE C3 C2 CD 38 30 DC 10 8E 16 D0 20 87 .......80..... . … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 6080: 09 80 F6 8E C3 C2 CD 38 30 A2 C8 8E 16 D0 20 .. ?.?....80...?.?. … 8080: 43 48 49 50 00 00 20 10 00 00 00 04 80 00 20 00 CHIP.. ....... . 8090: 94 83 A0 83 C3 C2 CD 38 30 02 BB 5A 30 5F EE 3D .......80..Z0_.=
This is an eprom cartridge. It has 33 8KiB banks of which the first holds the base menu, the other eproms can be banked into the $8000-9FFF area.
The bank selecting is done by writing to $DE00.
The values for the (extra) eprom banks are:
eprom banks 1- 8 : $38-3F eprom banks 9-16 : $28-2F eprom banks 17-24 : $18-1F eprom banks 25-32 : $08-0F
Setting bit 7 high will switch off EXROM.
Size | 8KiB to 262KiB sizes (1 bank of 8KiB and 1 to 8 banks of either 8KiB, 16KiB or 32KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 1B 00 01 00 00 00 00 00 00 ...@............ 0020: 52 45 58 20 45 50 32 35 36 00 00 00 00 00 00 00 REX EP256....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 C1 FE C3 C2 CD 38 30 20 A3 FD 20 50 FD 20 .......80 .. P. … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 09 80 F2 8F C3 C2 CD 38 30 A2 C8 8E 16 D0 20 A3 .......80..... . … 4060: 43 48 49 50 00 00 40 10 00 00 00 02 80 00 40 00 CHIP..@.......@. 4070: 09 80 09 80 C3 C2 CD 38 30 58 D8 20 84 FF 20 8A .......80X. .. .
This is an eprom cartridge. It has 9 eprom sockets, of which the first holds the base eprom with the base menu which is an 8KiB eprom, the other eprom sockets can handle 8KiB, 16KiB or 32KiB eproms, of which 8KiB can be banked into the $8000-9FFF area.
The bank selecting is done by writing to $DFA0. Bits 2, 1 and 0 determine which socket is used and bits 5 and 4 are used to select an 8KiB piece of the eprom.
The possible values for bits 5 and 4 for the (extra) eprom banks are:
8KiB : 3, 2, 1, 0 16KiB bank 0 : 2, 0 16KiB bank 1 : 3, 1 32KiB bank 0 : 0 32KiB bank 1 : 1 32KiB bank 2 : 2 32KiB bank 3 : 3
Reading from $DFC0 switches off the EXROM. Reading from $DFE0 switches on the EXROM.
Size | 8KiB (1 bank of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 1C 00 01 00 00 00 00 00 00 ...@............ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 60 80 FE 80 C3 C2 CD 38 30 4C 07 87 4C CA 82 41 `......80L..L..A
The $9E00-$9EFF range is mirrored at $DE00-$DEFF. The $9F00-$9FFF range is mirrored at $DF00-$DFFF.
Size | 32KiB (1 bank of 32KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $0000-$7FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 1D 01 00 00 00 00 00 00 00 ...@............ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 80 10 00 00 00 00 00 00 80 00 CHIP............ 0050: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
This cart has 32KiB of ROM, bank 0 is in the cart image but is unused. The first 8KiB of the cart image is unused, the second 8KiB of the cart image is mapped to $E000-$FFFF, the third 8KiB of the cart image is mapped to $8000-$9FFF and the fourth 8KiB of the cart image is mapped to $A000-$BFFF. An NMI can be triggered by the cart, if address $0001 is written to and the cartridge is enabled. The cart can be disabled by software, by clearing bit 4 when writing to $DF00-$DFFF. Cart ROM at $E000-$FFFF can be disabled by setting bit 5 to 0 when writing to $DF00-$DFFF. Cart ROM at $8000-$BFFF can be disabled by setting bit 6 to 1 when writing to $DF00-$DFFF. Bit 7 of a byte written to $DF00-$DFFF can be read back from the cartridge if enabled (like a memory cell).
Size | 32KiB (4 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 1E 00 01 00 00 00 00 00 00 ...@............ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: EA 78 48 A9 7F 8D 0D DD D0 0E 48 AD 0D DD 10 04 .xH.......H..... … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 09 80 0C 80 C3 C2 CD 38 30 4C E9 80 4C 81 81 4C .......80L..L..L … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 4070: 09 80 0E 80 C3 C2 CD 38 30 A2 00 4C EF FC 20 BC .......80..L.. . … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 6080: 09 80 0C 80 C3 C2 CD 38 30 4C 70 88 4C 3F 80 4C .......80Lp.L?.L
The control register is the I/O-1 range:
bit meaning --- ------- 0 Eprom banking bit 0 (bank address 13) 1 Controls the GAME line (0 sets GAME low, 1 sets GAME high) 2 Freeze-end bit (disables the register and hides any rom bank) 3 Controls the Exrom line (1 sets EXROM low, 0 sets EXROM high) 4 Eprom banking bit 1 (bank address 14) 5-7 Unused
The first page of the currently banked ROM block can be read in the I/O-2 range.
Size | 16KiB (2 banks of 8KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF (bank 0), $E000-$FFFF (bank 1) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 1F 01 00 00 00 00 00 00 00 ...@............ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: F9 80 B6 80 C3 C2 CD 38 30 FD 80 89 80 4C 0C 88 .......80....L.. … 2050: 43 48 49 50 00 00 20 10 00 00 00 00 E0 00 20 00 CHIP.. ....... . 2060: 85 56 20 0F BC A5 61 C9 88 90 03 20 D4 BA 20 CC .V ...a.... .. .
This cart has 16KiB of ROM, of which the first 8KiB is mapped in at $8000-$9FFF and the second 8KiB is used as a kernel replacement. The kernel replacement is achieved by a clip that needs to be installed inside the C64.
Reading from I/O-1 causes a capacitor to get charged with every read, once the capacitor is charged enough it switches the cart on.
Reading from I/O-2 causes a different capacitor to get charged with every read, once the capacitor is charged enough it switched the cart off.
Size | 1024KiB (64 banks of 2 * 8KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF (ROML), $A000-$BFFF or $E000-$FFFF (ROMH) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 20 01 00 00 00 00 00 00 00 ...@... ........ 0020: 45 61 73 79 46 6C 61 73 68 20 43 61 72 74 72 69 EasyFlash Cartri 0030: 64 67 65 00 00 00 00 00 00 00 00 00 00 00 00 00 dge............. 0040: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 0050: 00 85 5E FE C3 C2 CD 38 30 93 0D 2B 2B 2B 20 45 ..^....80..+++ E
EasyFlash is a 1 MiB Flash EPROM card with multiple configurations and banks possible, it also has 256 bytes of RAM which is mapped into the I/O-2 range.
There are two control registers, one at $DE00 and one at $DE02.
The register at $DE00 does the following:
bit meaning --- ------- 7 LED control 6-3 Unused 2 Mode (0/1) 1 Exrom line control 0 Game line control
The register at $DE02 controls which bank is mapped into ROMH and ROML.
Size | - |
EXROM | - |
GAME | - |
Load address | - |
This CRT type is not actually related to a seperate hardware, it is used by some EasyFlash related tools as a container format. Consequently VICE does (can) not load files of this type.
Size | 8KiB (1 bank of 8KiB) |
EXROM | inactive (hi) (1) |
GAME | inactive (hi) (1) |
Load address | $E000-$FFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 22 00 00 00 00 00 00 00 00 ...@..."........ 0020: 4D 61 67 69 63 20 46 6F 72 6D 65 6C 00 00 00 00 Magic Formel.... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 01 E0 00 20 00 CHIP.. ....... . 0050: 00 0A 0D 8A B4 A1 20 80 00 0A 82 8A 8D 20 9E 20 ...... ...... .
This cart has 8KiB of ROM which is mapped to $E000, and 8KiB of RAM which is mapped to $6000. The cartridge is disabled after a reset.
When the freeze button is pressed the following happens:
Size | 16KiB (2 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 23 00 01 00 00 00 00 00 00 ...@...#........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: EA A9 E3 48 A9 7B 48 08 4C 1A 80 EA EA EA 48 AD ...H.{H.L.....H. … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 09 80 5E FE C3 C2 CD 38 30 78 A2 FB D8 9A A9 27 ..^....80x.....'
This cart has 16KiB of ROM of which 8KiB is mapped in at both ROML and ROMH. Bank switching and control register is done through the I/O-1 range:
bit meaning --- ------- 7-4 unused 3 Exrom line control 2 Disable cart 1 Unused 0 Bank
Size | 32KiB, 64KiB or 128KiB (4, 8 or 16 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 24 00 01 00 00 00 00 00 00 ...@...$........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 0C 80 C3 C2 CD 38 30 4C 7F 81 4C 87 81 4C .......80L..L..L
Note: When the Cartridge Hardware Subtype/Revision (Offset 0x1A in the CRT Header) is 1, then the image utilizes features only present in the "Nordic Replay" (see description of Nordic/Atomic Power)
The Retro Replay has three registers: Two write-only ($DE00 & $DE01) and one read-only register ($DE00 & $DE01 giving the same results).
The register at $DE00 is reset to $00 on a hard reset if not in flash mode. If in flash mode, it is set to $02 in order to prevent the computer from starting the normal cartridge. Flash mode is selected with a jumper.
Register at $DE00:
bit meaning --- ------- 0 Controls the GAME line: A 1 asserts the line, a 0 will deassert it. 1 Controls the EXROM line: A 0 will assert it, a 1 will deassert it. 2 Writing a 1 will disable further write accesses to all registers of the Retro Replay, and set the memory map of the C64 to standard, as if there is no cartridge installed at all. 3 Controls bank-address 13 for ROM and RAM banking. 4 Controls bank-address 14 for ROM and RAM banking. 5 Switches between ROM and RAM: 0=ROM, 1=RAM 6 Must be written once to "1" after a successful freeze in order to set the correct memory map and enable bits 0 and 1 of this register. Otherwise no effect. 7 Controls bank-address 15 for ROM banking.
The register at $DE01 is the extended control register. If not in Flash mode, bits 1, 2 and 6 can only be written once. If in Flash mode, the REUcomp bit cannot be set, but the register will not be disabled by the first write. Bit 5 is always set to 0 if not in Flash mode.
Register at $DE01:
bit meaning --- ------- 0 Enable clockport connector. 1 AllowBank (1 allows banking of RAM in $DF00/$DE02 area) 2 NoFreeze (1 disables Freeze function) 3 Bank-address 13 for RAM and ROM (mirror of $DE00) 4 Bank-address 14 for RAM and ROM (mirror of $DE00) 5 Bank-address 16 for ROM (only in flash mode) 6 REU compatibility bit. 0=standard memory map, 1 = REU compatible memory map 7 Bank-address 15 for ROM (mirror of $DE00)
Reading from the registers at either $DE00 or $DE01 will return the content of the status register.
Status register:
bit meaning --- ------- 0 1=Flashmode active (jumper set) 1 feedback of AllowBank bit 2 1=Freeze button pressed 3 feedback of banking bit 13 4 feedback of banking bit 14 5 feedback of banking bit 16 6 1=REU compatible memory map active 7 feedback of banking bit 15
The following memory maps are available:
Note: If the AllowBank bit is not set, the $DF00-$DFFF area will always access bank 0 of the RAM, so the older cartridge images will work. The AllowBank bit does not have any effect on the ROM mirror in that area.
Note: If the AllowBank bit is not set, the $DE02-$DEFF area will always access bank 0 of the RAM, so the older cartridge images will work. The AllowBank bit does not have any effect on the ROM mirror in that area.
Size | 8KiB (1 bank of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 25 00 01 00 00 00 00 00 00 ...@...%........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 64 97 C3 C2 CD 38 30 78 D8 A2 FF 9A 20 D4 ..d....80x.... .
The clockport registers of this cart can be switched to either $DE01-$DE0F or $DF21-$DF2F. The control registers are available at $DF10-$DF13.
The register at $DE01 / $DF21 is write only:
bit meaning --- ------- 7-1 Unused 0 0 = disable clock port, 1 = enable clockport
The registers at $DE02-$DE0F / $DF22-$DF2F are for the clock port and are read/write.
The register at $DF10 is the MMC64 SPI transfer register, a byte written to this registers is sent to the card & response from the card is read here.
The register at $DF11 is the MMC64 control register:
bit meaning --- ------- 0 0 = MMC64 BIOS active, 1 = external ROM active 1 0 = card selected, 1 = card not selected 2 0 = 250khz transfer, 1 = 8mhz transfer 3 0 = clock port @ $DE00, 1 = clock port @ $DF20 4 0 = normal Operation, 1 = flash mode (*) 5 0 = allow external rom when BIOS is disabled, 1 = disable external ROM 6 0 = SPI write trigger mode, 1 = SPI read trigger mode 7 0 = MMC64 is active, 1 = MMC64 is completely disabled (**)
(*) bit can only be programmed when flash jumper is set (**) bit can only be modified after unlocking
The register at $DF12 is the MMC64 status register, which is read-only:
bit meaning --- ------- 0 0 = SPI ready, 1 = SPI busy 1 external GAME line 2 external EXROM line 3 0 = card inserted, 1 = no card inserted 4 0 = card write enabled, 1 = card write disabled 5 0 = flash jumper not set, 1 = flash jumper set 6-7 unused
The register at $DF13 is the MMC64 identification register, which when reading from it can have the following values:
$64 when bit 1 of $DF11 is 0. $01 when bit 1 of $DF11 is 1 and REV A hardware is used. $02 when bit 1 of $DF11 is 1 and REV B hardware is used.
when writing to it it can be used to unlock bit 7 of $DF11 or to re-enable the cart:
Write $55 & $AA into this register to unlock bit 7 of $DF11. Write $0A & $1C into this register to re-enable MMC64 hardware.
Size | 64KiB or 512KiB (8 or 64 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 26 00 00 00 00 00 00 00 00 ...@...&........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 1A 80 6E 9E C3 C2 CD 38 30 4D 4D 43 52 45 50 4C ..n....80MMCREPL
The cart uses the following registers:
$DE00 - RR control register write
bit meaning --- ------- 0 GAME line 1 EXROM line 2 1 = disable RR, bit can be reset by setting bit 6 of $DF12 3 bank address 13 4 bank address 14 5 0 = rom enable, 1 = ram enable 6 1 = exit freeze mode 7 bank address 15
$DE01 - extended RR control register write
bit meaning --- ------- 0 0 = disable clockport, 1 = enable clockport 1 0 = disable I/O RAM banking, 1 = enable I/O RAM banking 2 0 = enable freeze, 1 = disable freeze 3 bank address 13 (mirror of $DE00) 4 bank address 14 (mirror of $DE00) 5 0 = enable MMC registers, 1 = disable MMC registers. Can only be written when bit 6 of $DF12 is 1. Register becomes effective when bit 0 of $DF11 is 1. 6 0 = RAM/ROM at $DFxx, 1 = RAM/ROM at $DExx 7 bank address 15 (mirror of $DE00)
$DE02-$DE0F - Clockport memory area (when enabled)
$DF10 - MMC SPI transfer register, a byte written is sent to the card & response from the card is read here.
$DF11 - MMC control register
bit meaning --- ------- 0 0 = MMC BIOS enabled, 1 = MMC BIOS disabled. Enabling MMC BIOS sets ROM banking to the last 64KiB bank. 1 0 = card selected, 1 = card not selected. This bit also controls the green activity LED. 2 0 = 250khz transfer, 1 = 8mhz transfer 3 ALWAYS 0 4 ALWAYS 0 5 (in RR-Mode:) 0 = allow RR rom when MMC BIOS disabled , 1 = disable RR ROM (in mmcreplay bios mode:) RAM banking (0 = $E000 - $FFFF, 1 = $8000 - $9FFF) (in 16KiB mode:) enable RAM at $A000 - $BFFF 6 0 = SPI write trigger mode, 1 = SPI read trigger mode 7 ALWAYS 0
$DF12 - MMC status register
bit meaning --- ------- 0 0 = SPI ready, 1 = SPI busy (read) 1 = forbid ROM write accesses (write). Setting this bit will disable writes to ROM until next reset 1 feedback of $DE00 bit 0 (GAME) 2 feedback of $DE00 bit 1 (EXROM) 3 0 = card inserted, 1 = no card inserted 4 0 = card write enabled, 1 = card write disabled 5 EEPROM DATA line / DDR register. Setting DATA to "1" enables reading data bit from EEPROM at this position. 6 0 = RR compatibility mode, 1 = Extended mode Selecting RR compatibility mode limits RAM to 32KiB and disables writes to extended banking register. Selecting Extended mode enables full RAM banking and enables Nordic Power mode in RR mode. 7 EEPROM CLK line
$DF13 - Extended banking register Can only be read/written to when bit 6 of $DF12 is 1
bit meaning --- ------- 0 bank address 16 1 bank address 17 2 bank address 18 3 ALWAYS 0 4 ALWAYS 0 5 16KiB rom mapping 6 1 = enable RR register. Disabling RR register disables ALL ROM/RAM banking too. 7 ALWAYS 0
NOTE THAT THE MMC REPLAY EMULATION IS CURRENTLY INCOMPLETE AND CONSIDERED BROKEN.
Size | 64KiB or 128KiB (4 or 8 banks of 16KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 27 00 01 00 00 00 00 00 00 ...@...'........ 0020: 49 44 45 36 34 20 43 41 52 54 52 49 44 47 45 20 IDE64 CARTRIDGE 0030: 49 44 45 44 4f 53 20 32 30 31 33 31 32 31 32 00 IDEDOS 20131212? 0040: 43 48 49 50 00 00 40 10 00 02 00 00 80 00 40 00 CHIP..@.......@. 0050: 63 80 5E FE C3 C2 CD 38 30 20 49 44 45 36 34 20 c.^....80 IDE64
The IDE64 cart uses the following registers:
$DE20 - $DE2F IDE BUS Registers $DE30 - Low Data HDD register $DE31 - High Data HDD register
$DE32 register:
bit meaning --- ------- 7 unused (0) 6 unused (0) 5 unused (0) 4 version number (1) 3 romaddr15 2 romaddr14 1 game 0 exrom
$DE32 - $DE35 = IDE64 ROM bank select registers $DE5F = RTC access (bit 0 only to serial accessed RTC) $DE60 - $DEFF = ROM used by software $DEFB = IDE64 clock reset, kill the cartridge $DEFC - $DEFF = IDE64 memory configuration registers
Size | 32KiB (4 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 28 00 00 00 00 00 00 00 00 ...@...(........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 80 AD B5 80 C3 C2 CD 38 30 08 48 A9 06 8D 00 DF .......80.H..... … 2050: 43 48 49 50 00 00 20 10 00 00 00 00 A0 00 20 00 CHIP.. ....... . 2060: 4C FA A0 A9 07 8D 00 DD 2C 00 DD 50 FB 2C 00 DD L.......,..P.,.. … 4060: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 4070: 13 80 BC FE C3 C2 CD 38 30 08 48 A9 02 8D 00 DF .......80.H..... … 6070: 43 48 49 50 00 00 20 10 00 00 00 01 A0 00 20 00 CHIP.. ....... . 6080: F0 8A 48 A9 00 85 22 85 23 8D 53 0F 20 0C A1 B0 ..H...".#.S. ...
This cart has 32KiB of ROM and 8KiB of RAM, it uses I/O-1 as a mirror of the last page of cart RAM. It has the following registers in the I/O-2 range:
ROM config register at $DF00 (can only be written to):
bit meaning --- ------- 0 ? 1 ? (write 1 to release freeze mode) 2 ROM bank select 3 write 1 to disable cartridge 4-6 unused 7 ?
Note: if bit0, bit1, bit7 are all 0, then ultimax mapping is selected and RAM is enabled at ROML, otherwise if bit 0 is 0, then 16KiB mapping is enabled, or if bit 0 is 1, then 8KiB mapping is enabled.
RAM config register at $DF01 (read/write):
If written value == last value - 1, then ultimax mapping is selected and RAM is enabled at ROML, if written value == last value + 1, then ROM is enabled at ROML and exrom is deasserted (switch to either 8KiB or 16KiB mapping)
$DF02-$DFFF holds the last page of the first 8KiB of the current bank.
Size | 4KiB (1 bank of 4KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$8FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 29 00 01 00 00 00 00 00 00 ...@...)........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 10 10 00 00 00 00 80 00 10 00 CHIP............ 0050: 09 80 7A 80 C3 C2 CD 38 30 8E 16 D0 20 84 FF 20 ..z....80... ..
The cart uses a TPI for the IEEE488 interface/communication in the I/O-2 range:
$DF00 - Port A Data $DF01 - Port B Data $DF02 - Port C Data $DF03 - Port A Direction $DF04 - Port B Direction $DF05 - Port C Direction $DF06 - Control register $DF07 - Active Interrupt register
Size | 8KiB (1 bank of 8KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $E000-$FFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 2A 01 00 00 00 00 00 00 00 ...@...*........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 E0 00 20 00 CHIP.. ....... . 0050: 00 25 08 CF 07 9E 32 30 38 38 20 4D 43 2E 43 52 .%....2088 MC.CR
When the cartridge is active, ultimax is enabled when the address being accessed is is the $E000-$FFFF range, so the ROM is visible at $E000, below is normal C64 RAM. The cart can be disabled by writing to either I/O-1 or I/O-2 range. When the freezer button is pressed, the cartridge will be enabled and an NMI will be triggered.
Size | 256KiB (32 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 2B 00 01 00 00 00 00 00 00 ...@...+........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 09 80 C3 C2 CD 38 30 78 A0 00 84 F8 84 FA .......80x......
The control register is the I/O-2 range:
bit meaning --- ------- 7-6 unused 5 disable cart 4-0 bank select
Size | 8KiB (1 bank of 8KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $E000-$FFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 2C 01 00 00 00 00 00 00 00 ...@...,........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 E0 00 20 00 CHIP.. ....... . 0050: 85 56 20 0F BC A5 61 C9 88 90 03 20 D4 BA 20 CC .V ...a.... .. .
This cart has 8KiB of ROM, mapped in at $E000-$FFFF only when hirom is selected. The cart uses a clip that needs to be installed inside the C64.
Size | 8KiB (1 bank of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 2D 00 01 00 00 00 00 00 00 ...@...-........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 10 80 10 80 C3 C2 CD 38 30 20 00 00 00 00 00 00 .......80 ......
When reading from the I/O-1 range the cart is enabled, when reading from the I/O-2 range the cart is disabled. When the freeze button is pressed the ROM is mapped to both $8000-$9FFF and $E000-$FFFF.
Size | 16KiB or 32KiB (2 or 4 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 2E 00 01 00 00 00 00 00 00 ...@............ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 3A 83 60 80 C3 C2 CD 38 30 20 00 00 40 00 00 00 :.`....80 ..@... … 2050: 43 48 49 50 00 00 20 10 00 00 00 00 A0 00 20 00 CHIP.. ....... . 2060: 78 A9 34 85 01 A0 00 B1 F8 91 F6 E6 F8 D0 02 E6 x.4............. … 4060: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 4070: 3A 83 60 80 C3 C2 CD 38 30 20 00 00 40 00 00 00 :.`....80 ..@... … 6070: 43 48 49 50 00 00 20 10 00 00 00 01 A0 00 20 00 CHIP.. ....... . 6080: 78 A9 34 85 01 A0 00 B1 F8 91 F6 E6 F8 D0 02 E6 x.4.............
Warning, the following information is based on guess-work and might be incorrect, any further information and/or corrections are appreciated.
When reading from the I/O-1 range ROM bank 0(/2) is mapped to $8000-$9FFF and ROM bank 1(/3) is mapped to $A000-$BFFF. When reading from the I/O-2 range the cart is disabled. When a reset happens the ROM banks get switched and ROM bank 0(/2) is mapped to $8000-$9FFF. When a freeze happens ROM bank 0(/2) is mapped to both $8000-$9FFF and $E000-$FFFF.
Size | 4KiB (1 bank of 4KiB) |
EXROM | inactive (hi) (1) |
GAME | inactive (hi) (1) |
Load address | $E000-$EFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 2F 00 00 00 00 00 00 00 00 ...@.../........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 10 10 00 00 00 00 E0 00 10 00 CHIP............ 0050: 78 D8 48 8A 48 98 48 AC 0D DD 10 03 4C EE F2 AD x.H.H.H.....L...
Warning, the following information is based on guess-work and might be incorrect, any further information and/or corrections are appreciated.
The cart has a control bit (bit 0) in the I/O-2 range which is used to disable or enable the cart.
Size | 16KiB (2 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 30 00 01 00 00 00 00 00 00 ...@...0........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: D7 86 5E FE C3 C2 CD 38 30 A9 00 2C A9 FF 85 FE ..^....80..,.... … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: E8 96 5E FE C3 C2 CD 38 30 20 6C 81 A9 09 8D 99 ..^....80 l.....
Warning, the following information is based on guess-work and might be incorrect, any further information and/or corrections are appreciated.
The cart has 16KiB of ROM which are used as two banks of 8KiB, they are mapped into $8000-$9FFF and the last page of the current ROM bank is mirrored in $DF00-$DFFF. The cart has a control bit (bit 7) at $DF00, which is used to select what ROM bank is used.
Size | 16KiB (2 banks of 8KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF (bank 1), $A000-$BFFF (bank 2) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 31 01 00 00 00 00 00 00 00 ...@...1........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: EA 2C 80 DF 50 FB A0 00 8C 80 DF B9 E3 A3 29 0F .,..P.........). … 2050: 43 48 49 50 00 00 20 10 00 00 00 00 A0 00 20 00 CHIP.. ....... . 2060: 4A EB C0 49 6A EA BB FB 4E CA 43 1E 75 63 15 97 J..Ij...N.C.uc..
This cart has 16KiB of ROM, mapped in at reset at $8000-$BFFF. The cart is controled through a TPI at $DF80-$DF87:
$DF80 - Port A Data $DF81 - Port B Data $DF82 - Port C Data $DF83 - Port A Direction $DF84 - Port B Direction $DF85 - Port C Direction $DF86 - Control register $DF87 - Active Interrupt register
The cart has a pass-through port and does the following at start-up:
Size | 16KiB (2 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 32 00 01 00 00 00 00 00 00 ...@...2........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: EA EA 68 AA 68 85 94 68 85 95 68 85 96 68 85 97 ..h.h..h..h..h.. … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 30 80 5E FE C3 C2 CD 38 30 20 04 90 4C 38 DF 1A 0.^....80 ..L8..
Warning, the following information is based on guess-work and might be incorrect, any further information and/or corrections are appreciated.
I/O-1 is somehow used to enable the cart, the exact way in which this is done is unknown. Reading from the I/O-2 range will give you the last page of the current ROM bank, and writing to it will disable the cart.
Size | 4KiB or 8KiB (1 bank of 4KiB or 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$8FFF (4KiB), $8000-$9FFF (8KiB) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 33 00 01 00 00 00 00 00 00 ...@...3........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: AF 83 5E FE C3 C2 CD 38 30 4D 41 43 48 35 A5 93 ..^....80MACH5..
This cart has 8KiB ROM mapped at $8000-$9FFF, the $9E00-$9EFF range is mirrored at $DE00-$DEFF and the $9F00-$9FFF range is mirrored at $DF00-$DFFF.
Size | 8KiB (1 bank of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 34 00 01 00 00 00 00 00 00 ...@...4........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 09 80 C3 C2 CD 38 30 AD 11 D0 29 10 D0 62 .......80...)..b
Accessing I/O-1 (the software uses $DE00 only it seems) disables cartridge ROM. A reset enables 8KiB game mode and the ROM bank is mapped to $8000. A freeze causes ROM to be mapped to $8000.
Size | 64KiB (4 banks of 16KiB) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Startup mode | 16KiB Game |
Load address | $8000-$BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 35 00 00 00 00 00 00 00 00 ...@...5........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 31 80 BB 0E C3 C2 CD 38 30 50 46 20 56 31 2E 30 1......80PF V1.0 … 4050: 43 48 49 50 00 00 40 10 00 00 00 01 80 00 40 00 CHIP..@.......@. 4060: A2 FE 9A 20 EC AE 20 82 80 20 74 86 20 A5 8B 4C ... .. .. t. ..L … 8060: 43 48 49 50 00 00 40 10 00 00 00 02 80 00 40 00 CHIP..@.......@. 8070: 5A 01 02 03 04 06 0A 0B 10 14 1E 28 3C 00 00 00 Z..........(<... … C070: 43 48 49 50 00 00 40 10 00 00 00 03 80 00 40 00 CHIP..@.......@. C080: 1E 03 14 82 09 05 09 0F 0C 0D 0F 05 09 09 0B 0A ................
This cart has 64KiB ROM (2 32KiB Eproms, mapped to $8000 and $A000 in 16KiB Game Mode), and 32KiB RAM (mapped to $8000 and $A000 in 16KiB Game Mode). The cart has 1 (write-only) bank control register which is located at $DE80 and mirrored throughout the $DE80-$DEFF range:
Bit 0: unused/don't care Bit 1: Bank select: 0=upper, 1=lower (not correct ?!) Bit 2: chip select 0 Bit 3: chip select 1 Bit 4: cartridge enable/disable: 0=enable, 1=disable Bits 5-7: unused/don't care
Chip select combinations of 0/1 are:
00: Eprom "79" 01: Eprom "ZS3" 10: Ram 11: empty space (reading returns VIC-II data)
note: on the original hardware "disabling" the cartridge by setting bit 4 of the control register does NOT prevent write accesses to the cartridge RAM!. So to actually disable the RAM, it is suggested to write $FF to the register.
Size | 24KiB (3 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Startup mode | 16KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 36 00 00 00 00 00 00 00 00 ...@...6........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 A2 89 C3 C2 CD 38 30 20 D3 83 78 8D 00 DE .......80 ..x... … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 72 A2 05 A5 45 10 01 CA A5 46 10 02 CA CA 86 28 r...E....F.....( … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 4070: 78 A2 FF 9A D8 A9 08 8D 16 D0 A0 00 98 99 02 00 x...............
This cart has 24KiB ROM (3 8KiB Eproms)
reading io1: - switches to 16KiB game mode - first eprom mapped to 8000 (ROML) - second eprom mapped to A000 (ROMH) writing io1: - switches to ultimax mode _only_: - if 0xc000 > address >= 0x8000 - if address >= 0xe000 (meaning 0x0000-0x7fff and 0xc000-0xdfff gives normal c64 ram/io) - first eprom mapped to 8000 (ROML) - third eprom mapped to e000 (ROMH)
Size | 128KiB (16 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 00000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 00010: 00 00 00 40 01 00 00 37 00 01 00 00 00 00 00 00 ...@...7........ 00020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 00030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 00050: 09 80 09 80 C3 C2 CD 38 30 78 A2 FF 9A D8 A9 00 .......80x...... … 02050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 02060: 00 21 1D A9 90 1B 67 70 FD B0 04 C3 19 B9 11 2D .!....gp.......- … 04060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 04070: 00 41 62 92 AD 71 32 87 08 20 BE 90 4C 36 8F 20 .Ab..q2.. ..L6. … 06070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 06080: 00 61 00 02 02 03 0D 40 82 15 D0 A1 08 40 84 00 .a.....@.....@.. … 08080: 43 48 49 50 00 00 20 10 00 00 00 04 80 00 20 00 CHIP.. ....... . 08090: 00 81 8A 85 0D F0 8A 28 83 F8 8A 00 8B 58 83 60 .......(.....X.` … 0A090: 43 48 49 50 00 00 20 10 00 00 00 05 80 00 20 00 CHIP.. ....... . 0A0A0: 00 A1 C2 E3 C4 86 32 14 00 C5 40 EA 13 CA CB CC ......2...@..... … 0C0A0: 43 48 49 50 00 00 20 10 00 00 00 06 80 00 20 00 CHIP.. ....... . 0C0B0: 00 C1 81 59 60 00 81 5D D9 58 5E EE 58 6E 3C 28 ...Y`..].X^.Xn<( … 0E0B0: 43 48 49 50 00 00 20 10 00 00 00 07 80 00 20 00 CHIP.. ....... . 0E0C0: 00 E1 0F BF 3D 56 00 7E 52 FD 50 03 AA 00 0D 40 ....=V.~R.P....@ … 100C0: 43 48 49 50 00 00 20 10 00 00 00 08 80 00 20 00 CHIP.. ....... . 100D0: 01 01 B9 D1 0D 15 89 55 65 45 41 C5 01 45 45 A8 .......UeEA..EE. … 120D0: 43 48 49 50 00 00 20 10 00 00 00 09 80 00 20 00 CHIP.. ....... . 120E0: 01 21 0C C7 29 54 41 29 4D C5 06 24 C7 24 8F 81 .!..)TA)M..$.$.. … 140E0: 43 48 49 50 00 00 20 10 00 00 00 0A 80 00 20 00 CHIP.. ....... . 140F0: 01 41 EA 87 7A AF 95 67 BD F7 00 7D 6E C4 5D A6 .A..z..g...}n.]. … 160F0: 43 48 49 50 00 00 20 10 00 00 00 0B 80 00 20 00 CHIP.. ....... . 16100: 01 61 6A 92 6B 93 6B 94 6C 95 6D 96 6E 97 6E 98 .aj.k.k.l.m.n.n. … 18100: 43 48 49 50 00 00 20 10 00 00 00 0C 80 00 20 00 CHIP.. ....... . 18110: 01 81 0E 83 0D 0B 0F 81 FF 28 28 1E E3 0A 14 62 .........((....b … 1A110: 43 48 49 50 00 00 20 10 00 00 00 0D 80 00 20 00 CHIP.. ....... . 1A120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ … 1C120: 43 48 49 50 00 00 20 10 00 00 00 0E 80 00 20 00 CHIP.. ....... . 1C130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ … 1E130: 43 48 49 50 00 00 20 10 00 00 00 0F 80 00 20 00 CHIP.. ....... . 1E140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Cartridge hardware is designed around a 128KiB ROM (PROM or Mask ROM) which is divided into 16 banks each of 8KiB. When adressing the onboard bank-switching logic the requested ROM bank is mapped at address range $8000-$9fff (8KiB)
The cartridge PCB layout was cost-optimized for mass-production purposes.
The address-/data-lines and bank-switching logic uses the closest address-/data-lines with shortest and most direct path/distance in order to avoid too much PCB re-routing and keep production costs as low as possible.
This means that the respective address-/data-lines from the cartridge port may not necessarily connect with the corresponding address-/data-line of the ROM according to the official specs of the ROM.
This has over the years given some headaches and invalid dumps when cartridge dumpers that wanted to dump the cartridge contents by de-soldering the ROM and dumping it using an EPROM programmer/reader.
The image extracted from such an operation would need transformation according to the actual cartridge PCB re-routing of address-/data-lines. Alternatively one can make an adapter that implements this applied re-routing of the address-/data-lines.
This mass-production cost optimization also results in an obscured bank-switching address pattern/values more info on that later.
[HWrev1]: The original "Hugo" PCB [HWrev1] is labeled "HUGO Copyright 1990" on both sides of the PCB. PCB production date is stamped on the back og PCB in the format: "YYMM" 1Mib 27C010 EPROM or PROM (typical Atmel) "Hugo" PCB [HWrev1] contains the following discrete logic IC components: 74LS00N (DIP) and 74LS237N (DIP) DIP pitch (pin spacing) 2.54mm (0.1 inch) Assembly/production facilities: Philips, Strandlodsvej (Amager), Copenhagen, Denmark
[HWrev1] Bank-switching pattern: In order for the rom contents to appear as a continuous memory layout the following ROM bank-switching pattern must be applied by writing to adress 0xDE00: Cartridge bank-switching values: 00 80 10 90 20 a0 30 b0 40 c0 50 d0 60 e0 70 f0 Writing the bank-switch value to any address in address-range 0xDE00-0xDEFF will work.
[HWrev2]: Revised PCB [HWrev2] for SMD mount is labeled "SO-A4-1" on both sides of PCB. 1Mib Mask ROM (SOIC-32) PCB contains the following discrete logic SMD IC components: 74HCT02T (SOIC-14) and 74HCT174T (SOIC-16) SOIC (pitch) pin spacing 1.27mm (SMD mounted) Assembly/production facilities: Sono Press, Germany.
[HWrev2] Uses alternative bank-switching pattern: Writing *ANY* value to address 0xDE0y (offset y) will select ROM bank y Cartridge still has 16 banks and the lower four bits in the address selects the right bank. Hence the valid address range is 0xDE00-0xDE0F
Size | 32KiB (4 banks of 8KiB) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Startup mode | Ultimax |
Load address | $E000-$FFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 38 00 00 00 00 00 00 00 00 ...@...8........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 E0 00 20 00 CHIP.. ....... . 0050: 48 A9 FC 0C A9 FE 8D C2 DF 68 48 C9 8C F0 1C C9 H........hH..... … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 E0 00 20 00 CHIP.. ....... . 2060: EA EA 58 48 A9 FC 8D C2 DF 4C 6E E2 EA EA A9 FA ..XH.....Ln..... … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 E0 00 20 00 CHIP.. ....... . 4070: 4C 86 E4 A9 FE 78 8D C2 DF 60 78 8C C3 DF A9 FA L....x...`x..... … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 E0 00 20 00 CHIP.. ....... . 6080: EA EA 48 58 A9 FC 8D C2 DF 68 48 C9 46 D0 7E 68 ..HX.....hH.F.~h
the following is a quick overview of how the cartridge works, as its a bit unusual and different from most other cartridges:
- 27256 EPROM (32KiB) - 7430 TTL - MC6821 - 1 button (reset) rom bank 0x00 - 0x03 (0x04) 8192* 4 32KiB mapped to e000 MC6821 registers mapped to io2 at dfc0..dfc4 - press reset and hold delete to get the main menu - press reset and hold control to skip cbm80 check (dont start additional cartridge) - press RESTORE, then... - left arrow, return show disk directory - delete, 1 load"*" from disk, run - f1/f2 ? (disk stuff?) - f3/f4 ? (disk stuff?) - f5/f6, q enter monitor - f7/f8, 2 show drive error channel - control, cursor back to basic - type "help" in basic to get a list of available commands *** MC6821 Port usage Port A (parallel cable to floppy drive): dfc0 port a ddr dfc1 port a (in/out) Port B (controls banking) dfc2 port b ddr ($7f) dfc3 port b (out) bit3 1 = rom at $e000 enabled, 0 = cartridge disabled bit1-2 rom bank number bit0 ?
Size | 64KiB (8 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 39 00 01 00 00 00 00 00 00 ...@...9........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 0C 80 0C 80 C3 C2 CD 38 30 31 30 34 8E 16 D0 20 .......80104... … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: B9 0A 72 AB 0B F0 08 C9 2F 0C 10 27 E8 EF 5A C5 ..r...../..'..Z. … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 4070: C0 B4 6C A6 6A 0A 14 5E 65 AD 94 02 86 C8 30 1F ..l.j..^e.....0. … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 6080: A4 89 C6 3A C4 60 F0 10 4D F5 89 F0 13 6C E0 78 ...:.`..M....l.x … 8080: 43 48 49 50 00 00 20 10 00 00 00 04 80 00 20 00 CHIP.. ....... . 8090: 00 0B 08 14 00 9E 32 30 36 31 00 00 00 A0 35 BA ......2061....5. … A090: 43 48 49 50 00 00 20 10 00 00 00 05 80 00 20 00 CHIP.. ....... . A0A0: 1B 4A 00 53 90 77 8E 1A 1D 94 00 A6 E2 50 29 11 .J.S.w.......P). … C0A0: 43 48 49 50 00 00 20 10 00 00 00 06 80 00 20 00 CHIP.. ....... . C0B0: 14 F7 2E 1A 34 B4 60 53 07 88 C4 F0 21 F6 88 20 ....4.`S....!.. … E0B0: 43 48 49 50 00 00 20 10 00 00 00 07 80 00 20 00 CHIP.. ....... . E0C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
This cartridge type is very similar to the Magic Desk cart type: ROM memory is organized in 8KiB ($2000) banks located at $8000-$9FFF. Bank switching is done by writing the bank number to $DE00.
bit 0-2 bank number bit 3 exrom latch (1 = cart disabled until reset or powercycle)
Size | 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 3A 00 01 00 00 00 00 00 00 ...@...:........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 09 80 C3 C2 CD 38 30 78 A2 FF 9A D8 8E 16 .......80x......
This cartridge has a CS8900a based RR-Net compatible network interface, and on 8KiB ($2000) bank ROM located at $8000-$9FFF. The ROM can be switched on/off by writing to the IO1 space:
a write to $de80 enables the ROM a write to $de88 disables the ROM
Size | 24KiB (3 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Startup mode | 16KiB Game |
Load address | $8000-$9FFF (bank 1), $A000-$BFFF (banks 2/3) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 3B 00 00 00 00 00 00 00 00 ...@...;........ 0020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 59 89 BC FE C3 C2 CD 38 30 0B 80 B1 84 48 E6 84 Y......80....H.. … 2050: 43 48 49 50 00 00 20 10 00 00 00 00 A0 00 20 00 CHIP.. ....... . 2060: 04 0B 20 52 45 50 4C 49 43 41 54 45 20 FB 89 0F .. REPLICATE ... … 4060: 43 48 49 50 00 00 20 10 00 00 00 01 A0 00 20 00 CHIP.. ....... . 4070: 02 10 B5 00 C9 E3 D0 01 C8 C9 E2 D0 01 C8 C9 E0 ................
This cart uses 8KiB mapped in at $8000-$9FFF and 2 banks of 8KiB mapped in at $A000-$BFFF.
The bank at $A000-$BFFF is selected by bit 0 of the address of a write access to I/O-1.
A0 | bank --------- 0 | 0 1 | 1
Size | 512KiB (64 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 00000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 00010: 00 00 00 40 01 00 00 3C 00 01 00 00 00 00 00 00 ...@...<........ 00020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 00030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 00050: 09 80 09 80 C3 C2 CD 38 30 78 8E 16 D0 20 A3 FD .......80x... .. … 02050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 02060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ … 7E430: 43 48 49 50 00 00 20 10 00 00 00 3F 80 00 20 00 CHIP.. ....?.. . 7E440: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
GMod2 (Individual Computers)
This cart uses 512KiB Flash ROM (29F040) in 64 banks, mapped in at $8000-$9fff and has a 2KiB serial EEPROM (m93C86).
io1 - register at de00 bit7 (rw) write enable (write 1), EEPROM data output (read) bit6 (ro) EXROM (0=active) and EEPROM chip select (1=selected) bit5-0 (ro) rom bank bit5 EEPROM clock bit4 EEPROM data input see http://wiki.icomp.de/wiki/GMod2
Size | 16KiB (ULTIMAX mode) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF (bank 1), $E000-$FFFF (bank 2) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 3D 01 00 00 00 00 00 00 00 ...@...=........ 0020: 4D 41 58 20 42 41 53 49 43 00 00 00 00 00 00 00 MAX BASIC....... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 94 E3 7B E3 43 42 4D 42 41 53 49 43 30 88 41 87 ....CBMBASIC0.A.
This cartridge uses two 8KiB ROMs that contain BASIC and KERNAL for the MAX Machine. It also provides additional 2KiB RAM which will be mapped to $0800.
Size | 2MiB/4MiB/8MiB/16MiB (256/512/1024/2048 banks of 8KiB) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 00000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 00010: 00 00 00 40 01 00 00 3E 00 01 00 00 00 00 00 00 ...@...<........ 00020: 56 49 43 45 20 43 41 52 54 00 00 00 00 00 00 00 VICE CART....... 00030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 00050: 09 80 09 80 C3 C2 CD 38 30 78 8E 16 D0 20 A3 FD .......80x... .. … 02050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 02060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ … 001FF030: 43 48 49 50 00 00 20 10 00 00 00 FF 80 00 20 00 CHIP.. ....?.. . 001FF040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
GMod3 (Individual Computers)
This cart uses 2MiB/4MiB/8MiB/16MiB Flash ROM (EN25QH128A(2T)) in 256/512/1024/2048 banks, mapped in at $8000-$9fff.
io1 - register at de00-de07 (write) To select the ROM bank, write to de00-7. The lower 3 bits of the address are the upper three bits of the bank, as in: ldx #bankhi ; upper 3 bits of the bank number lda #banklo ; lower 8 bits of the bank number sta $de00,x - register at de00/de08 (read) The current ROM bank can be read from de00/de08, as in: ldx $de08 ; upper 3 bits of the bank number lda $de00 ; lower 8 bits of the bank number - register at de08 (write) bit7 (w) bitbang mode enabled bit6 (w) EXROM (0=active) bit5 (w) enable cartridge irq vectors - register at de00 (bitbang mode) bit7 (r) EEPROM data output bit6 (w) EEPROM chip select (0=selected) bit5 (w) EEPROM clock bit4 (w) EEPROM data input see http://wiki.icomp.de/wiki/GMod3
Size | 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 3f 00 01 00 00 00 00 00 00 ...@...?........ 0020: 5a 49 50 50 2d 43 4f 44 45 20 34 38 00 00 00 00 ZIPP-CODE 48.... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 11 de 7b e3 c3 c2 cd 38 30 41 80 00 00 03 81 31 ..?....80A.....1
reading IO1 enables the cartridge ROM reading IO2 disables the cartridge ROM the second last page of the ROM is mirrored in IO1
Size | 32KiB or 64KiB |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 40 00 00 00 00 00 00 00 00 ...@...@........ 0020: 42 4c 41 43 4b 42 4f 58 20 56 38 00 00 00 00 00 BLACKBOX V8..... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 09 80 22 80 c3 c2 cd 38 30 8e 16 d0 20 a3 fd 20 ..?....80... ..
writing to IO2 sets the cartridge config: A0 - EXROM A1 - GAME A2 - bank lsb A3 - bank msb
Size | 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 41 00 01 00 00 00 00 00 00 ...@...A........ 0020: 42 4c 41 43 4b 42 4f 58 20 56 33 00 00 00 00 00 BLACKBOX V3..... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: a7 85 2b 80 c3 c2 cd 38 30 8e 16 d0 20 a3 fd 20 ..+....80... ..
writing IO1 disables the cartridge ROM writing IO2 enables the cartridge ROM
Size | 16KiB |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 42 00 00 00 00 00 00 00 00 ...@...B........ 0020: 42 4c 41 43 4b 42 4f 58 20 56 34 00 00 00 00 00 BLACKBOX V4..... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: a7 85 2b 80 c3 c2 cd 38 30 8e 16 d0 20 a3 fd 20 ..+....80... ..
reading IO1 enables the cartridge ROM reading IO2 disables the cartridge ROM
Size | 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 43 00 01 00 00 00 00 00 00 ...@...C........ 0020: 52 45 58 20 52 41 4d 2d 46 4c 4f 50 50 59 00 00 REX RAM-FLOPPY.. 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 09 fe c3 c2 cd 38 30 20 a3 fd 20 50 fd 20 .......80 .. P.
This cartridge contains an 8KiB ROM which contains the software, plus up to 256KiB RAM which can then be used to store up to 100 programs. The RAM is battery buffered, and the cartridge can be disabled with a switch on the board.
dfa0 (write) selects RAM bank df50 (read) toggles RAM writeable dfc0 (read) toggles cartridge enable dfe0 (read) toggles RAM enable
Size | 2, 4 or 8KiB |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 44 00 01 00 00 00 00 00 00 ...@...D........ 0020: 42 49 53 2d 50 4c 55 53 00 00 00 00 00 00 00 00 BIS-PLUS........ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 09 80 5e fe c3 c2 cd 38 30 8e 16 d0 20 a3 fd a0 ..^....80... ...
This cartridge contains a 2, 4 or 8KiB ROM. The software is copied to RAM and then the cartridge disables itself by writing to IO1 (de00).
Size | 128KiB |
EXROM | active (lo) (0) |
GAME | active (lo) (0) |
Load address | $8000-BFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 45 00 00 00 00 00 00 00 00 ...@...E........ 0020: 53 44 2d 42 4f 58 00 00 00 00 00 00 00 00 00 00 SD-BOX.......... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 09 80 81 ea c3 c2 cd 38 30 a9 00 8d 00 de a9 40 .......80......@
This cartridge contains a 128KiB banked ROM with a filebrowser and some extra software on it. It also contains a sd2iec clone, which seems to be seperate and runs the original sd2iec firmware.
there is one register at de00: bit 0-3 ROM bank bit 4 reset SD bit 5 CE ROM bit 6 EXROM bit 7 register enable additionally there are 3 "ram cells" at de01-de03
Size | 1MiB, 64*16KiB (ULTIMAX mode) |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF (odd banks), $E000-$FFFF (even banks) |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 46 01 00 00 00 00 00 00 00 ...@...F........ 0020: 4d 55 4c 54 49 4d 41 58 00 00 00 00 00 00 00 00 MULTIMAX........ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 48 80 48 83 48 83 48 83 64 85 64 85 f5 87 aa 88 H.H.H.H.d.d.....
This cartridge contains 1MiB ROM organised in 64 16KiB banks. It operates in ultimax mode and contains all known ultimax releases. It also provides additional 2KiB RAM for MAX-Basic, which will be mapped to $0800.
there is one register mirrored in the entire IO1 space: bit 7 when set, the register is disabled and can only be reenabled by reset bit 0-5 select ROM bank 0-63
Size | 32KiB, 2*16KiB |
EXROM | inactive (hi) (1) |
GAME | active (lo) (0) |
Load address | $8000-$9FFF $E000-$FFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 47 00 00 00 00 00 00 00 00 ...@...G........ 0020: 42 4c 41 43 4b 42 4f 58 20 56 39 00 00 00 00 00 BLACKBOX V9..... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 40 00 CHIP..@.......@. 0050: 00 9a b6 fe c3 c2 cd 38 30 c3 ff 00 ff 00 ff 00 .......80.......
The cartridge starts in ultimax mode in the last bank. The IO1 area also contains a mirror of the second last ROM page.
a register is mapped to IO1, which is changed by accessing an address in the IO space, the address bits are mapped like this: bit 7 - bank (inverted on write) bit 6 - exrom bit 0 - game
Size | 8KiB ROM, 16KiB RAM |
EXROM | active (lo) (0) Initially |
GAME | inactive (hi) (1) Initially |
Load address | $8000-$9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 48 00 01 00 00 00 00 00 00 ...@...H........ 0020: 4c 54 2e 20 4b 45 52 4e 41 4c 20 48 4f 53 54 20 LT. KERNAL HOST 0030: 41 44 41 50 54 4f 52 20 36 2e 32 20 52 4f 4d 00 ADAPTOR 6.2 ROM. 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP............ 0050: 14 80 14 80 c3 c2 cd 38 30 00 38 37 30 30 30 30 .......80.......
The Lt. Kernal Host Adaptor (SCSI ID 7) boot rom looks on sector 0 of drive 0 (ID 0) to find the partition (LU or logical unit) information and DOS. If the drive is not found, it will start up in stock mode. See src/c64/cart/ltkernal.c for more details.
The Lt. Kernal Host Adaptor uses the following registers:
$DF00 = MC6821 Port A: Data and DDR $DF01 = MC6821 Port A: Control $DF02 = MC6821 Port B: Data and DDR $DF03 = MC6821 Port B: Control $DF04..7 = LTK Port and Freeze state
MC6821 Port A connects to the SCSI data bus (inverted). Data is saved to hard disk inverted to save data processing time.
signal meaning ------ ------- PA 7-0 /Data bus on SCSI (input/output) CA2 Pulses SCSI ACK (low to high)
MC6821 Port B connects to mostly the SCSI control bus. PB2.6 controls write access to 16KiB SRAM. When low (0), no writes are permitted, when high (1) writes are permitted to $8000-$9FFF AND $E000-$FFFF. Initially, this signal is low, which keeps the boot ROM mapped to $8000-$9FFF (lower 4KiB for the C64, upper 4KiB for the C128). Once a high (1) is written, the boot ROM is mapped out permanently until a reset. CB2 controls which KERNAL is in place. A high (1) uses the stock KERNAL while a low (0) maps in one of the 8K RAMs as the KERNAL. The other RAM at $8000-$9FFF memory is ONLY mapped in when PB2.6 is high (1). The HIRAM line from the PLA goes to the adaptor so it can determine the proper write action to the main RAM or adaptor RAM. Writing a high (1) to CB2 while PB2.6 is low (0) causes a system reset. The stock KERNAL is copied and then patched by the LTK DOS on startup.
signal meaning ------ ------- PB 7 /REQ on SCSI (input) PB 6 SRAM control PB 5 RST on SCSI (output) PB 4 SEL on SCSI (output) PB 3 /BUSY on SCSI (input) PB 2 /CD on SCSI (input) PB 1 /MSG on SCSI (input) PB 0 /IO on SCSI (input) CB2 KERNAL control
$DF04 - $DF07:
The LTK Port can be between 0 and 15. Only adaptors set to port 0 are allowed to change the host configuration. Any writes to this register while PB2.6 and CA2 are high (1), will result in the Lt. Kernal Host Adaptor being removed from the bus until a reset, essentially reconfiguring to a stock system.
bit meaning --- ------- 3-0 LTK port number (input) 4 Freeze state (0: active, 1: inactive)
Size | 64KiB ROM, 8KiB RAM |
EXROM | active (lo) (0) Initially |
GAME | inactive (hi) (1) Initially |
Load address | $8000-$BFFF and $E000-$FFFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 49 00 01 00 00 00 00 00 00 ................ 0020: 43 4d 44 20 52 41 4d 4c 49 4e 4b 20 32 2e 30 31 CMD RAMLink 2.01 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 20 00 CHIP............ 0050: 00 00 00 00 00 00 00 00 ee 42 df 20 1c b9 ee 42 ................ … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP............ 2060: 03 4c 75 9c 88 f0 01 88 8c 80 de a9 8d 20 38 8f ................ … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP............ 4070: 0a 17 d8 8d 64 8c be 00 ce 42 df 20 48 88 ce 42 ................ … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP............ 6080: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ … 8080: 43 48 49 50 00 00 20 10 00 00 00 04 80 00 20 00 CHIP............ 8090: 40 48 20 c9 ff aa 68 90 01 8a 60 20 bd ff 20 64 ................ … a090: 43 48 49 50 00 00 20 10 00 00 00 05 80 00 20 00 CHIP............ a0a0: 85 56 20 0f bc a5 61 c9 88 90 03 20 d4 ba 20 cc ................ … c0a0: 43 48 49 50 00 00 20 10 00 00 00 06 80 00 20 00 CHIP............ c0b0: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ … e0b0: 43 48 49 50 00 00 20 10 00 00 00 07 80 00 20 00 CHIP............ e0c0: a2 ff 78 9a d8 a9 00 8d 00 ff a2 0a bd 4b e0 9d ................ or 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 49 00 01 00 00 00 00 00 00 ................ 0020: 43 4d 44 20 52 41 4d 4c 49 4e 4b 20 31 2e 34 30 CMD RAMLink 1.40 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 40 10 00 00 00 00 80 00 20 00 CHIP............ 0050: 52 41 4d 4c 49 4e 4b 20 44 4f 53 20 28 43 29 31 ................ … 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP............ 2060: 4e 54 41 58 20 45 52 52 4f 52 00 57 52 49 54 45 ................ … 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP............ 4070: aa 09 f9 10 ec b9 9e 1b ec ce 3f 70 8d 84 df a9 ................ … 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP............ 6080: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ … 8080: 43 48 49 50 00 00 20 10 00 00 00 04 80 00 20 00 CHIP............ 8090: 40 48 20 c9 ff aa 68 90 01 8a 60 20 bd ff 20 64 ................ … a090: 43 48 49 50 00 00 20 10 00 00 00 05 80 00 20 00 CHIP............ a0a0: 85 56 20 0f bc a5 61 c9 88 90 03 20 d4 ba 20 cc ................ … c0a0: 43 48 49 50 00 00 20 10 00 00 00 06 80 00 20 00 CHIP............ c0b0: 80 8d 3f de a9 1b 8d 32 de 8d 34 de a9 ee 8d 33 ................ … e0b0: 43 48 49 50 00 00 20 10 00 00 00 07 80 00 20 00 CHIP............ e0c0: a2 ff 78 9a d8 a9 00 8d 00 ff a2 0a bd 4b e0 9d ................
The RAMLink CRT file is 64 KiB and consists of eight 8 KiB banks. The first two are for the RAMLink DOS which is banked in from $8000-$BFFF (16 KiB). The third and forth are the configuration portion of the DOS which also banks in at $8000-$BFFF, however only the first 8 KiB is officially used. The banks are the 64 shadow kernal, 64 trap kernal, 128 shadow kernal, and 128 trap kernal respectively. The first bytes of the configuration DOS bank contain 16-bit checksums of various parts of the ROM. The precise mapping is specific to the particular version of the ROM as the code resides there. The ROMs verify these checksums on boot up. Should this fail, the firmware turns on the error LED and goes into an infinite loop. Since vice doesn’t provide an error or activity LED for RAMLink, the system would just appear to hang.
The actual RAMLink appears to have the ability to upgrade to a 128 KiB ROM, but no firmware which utilizes it is known to exist.
The RAMLink uses many locations in IO2 primarily so that it can co-exist with other cartridges. Most of these registers are write only, that is to say, all that is required to activate them is a write; the contents of the write are not important. This technique minimizes the coding required to interact with the device. Although RAMLink has 2 pass-thru ports, they are not complete shorts to the cartridge bus, some of the control lines are altered based on the state of the device. Initially, RAMLink is disabled, the trap kernal is active and only one of its registers is visisble:
$DF7E = Enable RAMLink registers and switch to shadow kernal
Once a write is done to $DF7E, all the other registers become active. The shadow kernal also switches in.
$DF20 = NMI Trap Enable? (not certain as to its function) $DF21 = Mirror to $DF01 (for REU) when NMI trap is on $DF22 = NMI Trap Disable? (not certain as to its function) $DF40 = I8255A Port A (Main board and parallel interface) $DF41 = I8255A Port B $DF42 = I8255A Port C $DF43 = I8255A Control $DF60 = Enable DOS mapping (maps in $8000-$BFFF) $DF70 = Disable DOS mapping $DF7F = Disable RAMLink registers and switch to trap kernal (also disables DOS mapping) $DF80..9F = Switch SRAM page ($DF80 selects page 0, $DF81 selects page 1, $DF82 selects page 2, etc.) $DFA0 = I8255A Port A (RAMCard 1; RAMCard 2 uses custom circuit but same interface) $DFA1 = I8255A Port B $DFA2 = I8255A Port C $DFA3 = I8255A Control $DFB0..BF = 72421 RTC interface (RAMCard 2 only) $DFC0 = Maps in SRAM to $DE00-$DEFF $DFC1 = Maps in RAMCard to $DE00-$DEFF $DFC2 = Maps in RAM Port $DE00-$DEFF (GEORAM, RAMDrive) $DFC3 = Maps in Pass-Thru to $DE00-$DEFF
Note that only address $DF40..42, $DFB0..BF present valid information when read. Addresses $DFA0..$DFA3 also require valid data when being written to. See src/c64/cart/ramlink.c for more details.
When kernal swiching, the ROMs change inbetween instructions. This is possible as the CPU does not cache any incoming instructions. The following is an example of a JSR to the trap kernal at $E000:
PC TRAP SHADOW DETAILS KERNAL KERNAL ----- --------- --------- ------------------------------------------ $C000 JSR $E000 JSR $E000 Same code $E000 STA $DF7E STA $DF7F In trap kernel, next instruction in shadow $E003 INC $D021 INC $D020 Increment $D020 $E006 STA $DF7E STA $DF7F Switch back to trap on next instruction $E009 RTS NOP Return to $C003
If the shadow kernal was active, a JSR to $E000 would result in $D021 being incremented and continuing on back to the NOP in the shadow kernal. The use of write only registers allows the RAMLink Kernal and DOS to perform ROM switching with minimal instructions and time.
The RAMLink includes two switches: "Enable/Disable" and "Normal/Direct". "Enable/Disable" controls whether or not RAMLink is active. In the "Disabled" state, control will be given back to the stock ROMs. "Normal/Direct" controls how the IO cartidge lines to the RAM Port (REU, GEORAM, RAMDrive) are passed. In "Normal" mode, these lines are connected only when the RAMLink registers are active. This prevents any unauthorized access to these devices while RAMLink code isn’t running. "Direct" connects the IO lines all the time.
Size | 32KiB (4 banks of 8KiB each) |
EXROM | active (lo) (0) |
GAME | inactive (hi) (1) |
Startup mode | 8KiB Game |
Load address | $8000-9FFF |
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII ----------------------------------------------- ---------------- 0000: 43 36 34 20 43 41 52 54 52 49 44 47 45 20 20 20 C64 CARTRIDGE 0010: 00 00 00 40 01 00 00 4a 00 01 00 00 00 00 00 00 ......J........ 0020: 44 52 45 41 4e 20 48 45 52 4f 00 00 00 00 00 00 DREAN HERO...... 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0040: 43 48 49 50 00 00 20 10 00 00 00 00 80 00 20 00 CHIP.. ....... . 0050: 0b 80 bc fe c3 c2 cd 38 30 03 49 8e 16 d0 bd 00 .......80.I..... .. 2050: 43 48 49 50 00 00 20 10 00 00 00 01 80 00 20 00 CHIP.. ....... . 2060: 32 aa 5a aa 00 00 ff 00 90 d9 68 d9 00 00 90 05 2.Z.......h..... .. 4060: 43 48 49 50 00 00 20 10 00 00 00 02 80 00 20 00 CHIP.. ....... . 4070: ff 7f 7f ff ff 3f 00 00 00 00 00 c0 00 c0 ff 3f .....?.........? .. 6070: 43 48 49 50 00 00 20 10 00 00 00 03 80 00 20 00 CHIP.. ....... . 6080: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
This cartridge type was found in an argentinian H.E.R.O. clone cartridge, ROM memory is organized in 8KiB ($2000) banks located at $8000-$9FFF. There appears to be one register mirrored over IO2 (the software uses $DFFF). Banks are selected by writing to the lower 2 bits of the register, bit 5 disables the cartridge.
This section describes the SID file format used for SID tunes in the HVSC (High Voltage SID Collection - http://hvsc.de). It is based mostly on Michael Schwendt’s document that describes the file format and the PSID v2NG extensions described by Simon White and Dag Lem and was further extended by Wilfred Bos (PSID v3/v4, RSID v3/v4) and LaLa (assembled most of the following text) and last not least tweaked a bit by Groepaz to fit into the VICE documentation.
The original documentation maintained by the HVSC team can be found here: http://www.hvsc.de/download/C64Music/DOCUMENTS/SID_file_format.txt
SID files use the .sid file extension.
Since PSID v2 is simply an extension of PSID v1, PSID v2NG is an extension of PSID v2, RSID is a restricted version of PSID v2NG, PSID v3/v4 and RSID v3/v4 are extentions of PSID v2NG and RSID v2, all of the formats are discussed together below. RSID in specific is discussed in detail under the ’magicID’ field description.
The information presented here targets programmers or other people with reasonable background. It is not suitable for newbies who have never before used a machine code monitor, a disassembler, or a hexadecimal editor.
The detailed structure of the SID header looks like the following. Header offsets are in hexadecimal notation. Other integer values are decimal unless explicitly marked otherwise. Any stored integer values are in big-endian format:
+00 magicID: ``PSID'' or ``RSID''
This is a four byte long ASCII character string containing the value 0x50534944 or 0x52534944. ’RSID’ (Real SID) denotes that the file strictly requires a true Commodore-64 environment to run properly. ’PSID’ files will generally run trouble-free on older PlaySID and libsidplay1 based emulators, too.
Some words about the Real C64 SID file format (RSID):
The RSID format was designed to contain tunes that are not PlaySID compatible, but strictly require a real C64 environment to run. Tunes that are multi-speed and/or contain samples and/or use additional interrupt sources or do busy looping will cause older SID emulators to lock up or play very wrongly (if at all).
By using the name RSID for such rips all existing SID emulators will reject these tunes safely until they can be upgraded to cope with the additional requirements.
Due to the nature of these tunes, every effort must be made to make sure they are directly runnable on an actual C64 computer. As such the tunes will only be presented with the default C64 power-on environment and expected to configure and use all hardware appropriately.
RSID is based on PSIDv2NG with the following modifications:
The above fields MUST be checked and if any differ from the above then the tune MUST be rejected. The definitions above will force tunes to contain proper hardware configuration code and install valid interrupt handlers.
See section "The SID file environment" below for the default C64 power-on environment for each SID file format.
+04 WORD version
Available version number can be 0001, 0002, 0003 or 0004. Headers of version 2, 3 and 4 provide additional fields. RSID and PSID v2NG files must have 0002, 0003 or 0004 here.
+06 WORD dataOffset
This is the offset from the start of the file to the C64 binary data area. Because of the fixed size of the header, this is either 0x0076 for version 1 and 0x007C for version 2, 3 and 4.
+08 WORD loadAddress
The C64 memory location where to put the C64 data. 0 means the data are in original C64 binary file format, i.e. the first two bytes of the data contain the little-endian load address (low byte, high byte). This must always be true for RSID files. Furthermore, the actual load address must NOT be less than $07E8 in RSID files.
You must be absolutely sure what to enter here. There is no way to detect automatically whether the first two bytes in a C64 data file are meant to be a load address or some arbitrary bytes of code or data. Unless your C64 file is not a normal binary file and thus has no load address in front, you need not enter anything else than 0 here. The SID tune will not play if you specify a load address which is present in the C64 file already.
Normal C64 binary data files have a load address in their first two bytes, so they can be loaded to a pre-defined destination address by executing LOAD"FILE",8,1, for instance. If a load address is explicitly specified in the sidtune info file, some sidtune converters and utilities conjecture that the C64 data don’t have a load address in their first two bytes. Hence, the explicit load address from the info file is moved in front of the C64 data to create a valid C64 binary file which can be easily loaded on a C64, too. If that C64 file were to be saved, it would contain two superfluous data bytes at offset 2 if an original load address had been in the first two bytes of the old file. This process of adding a duplicate load address can be repeated. The file loader strips off the first two bytes (the used load address) and puts the rest of the file contents (including the now obsolete load address at file offset 2) into memory. If the new load address is the same than the old one the two added bytes cause the whole data to be displaced by two bytes, which most likely results in malfunctioning code. Also, superfluous bytes in memory then can confuse disassemblers which start at the beginning of the file or memory buffer.
+0A WORD initAddress
The start address of the machine code subroutine that initializes a song, accepting the contents of the 8-bit 6510 Accumulator as the song number parameter. 0 means the address is equal to the effective load address.
In RSID files initAddress must never point to a ROM area ($A000-$BFFF or $D000-$FFFF) or be lower than $07E8. Also, if the C64 BASIC flag is set, initAddress must be 0.
+0C WORD playAddress
The start address of the machine code subroutine that can be called frequently to produce a continuous sound. 0 means the initialization subroutine is expected to install an interrupt handler, which then calls the music player at some place. This must always be true for RSID files.
+0E WORD songs
The number of songs (or sound effects) that can be initialized by calling the init address. The minimum is 1. The maximum is 256.
+10 WORD startSong
The song number to be played by default. This value is optional. It often specifies the first song you would hear upon starting the program is has been taken from. It has a default of 1.
+12 LONGWORD speed
This is a 32 bit big endian number.
For version 1 and 2 and for version 2NG, 3 and 4 with PlaySID specific flag (+76) set, the ’speed’ should be handled as follows:
Each bit in ’speed’ specifies the speed for the corresponding tune number, i.e. bit 0 specifies the speed for tune 1. If there are more than 32 tunes, the speed specified for tune 32 is the same as tune 1, for tune 33 it is the same as tune 2, etc.
For version 2NG, 3 and 4 with PlaySID specific flag (+76) cleared, the ’speed’ should be handled as follows:
Each bit in ’speed’ specifies the speed for the corresponding tune number, i.e. bit 0 specifies the speed for tune 1. If there are more than 32 tunes, the speed specified for tune 32 is also used for all higher numbered tunes.
For all version counts:
Note that if ’play’ = 0, the bits in ’speed’ should still be set for backwards compatibility with older SID players. New SID players running in a C64 environment will ignore the speed bits in this case.
WARNING: This field does not work in PlaySID for Amiga like it was intended, therefore the above is a redefinition of the original ’speed’ field in SID v2NG! See also the ’clock’ (video standard) field described below for ’flags’.
+16 ``<name>'' +36 ``<author>'' +56 ``<released>'' (once known as ``<copyright>'')
These are 32 byte long ASCII character strings. Upon evaluating the header, these fields may hold a character string of 32 bytes which is not zero terminated. For less than 32 characters the string should be zero terminated. The maximum number of available free characters is 32.
+76 <data>
Version 1 of the SID header is complete at this point. The binary C64 data starts here.
Version 2, 3 and 4 of the header incorporates the v1 header fields and provides additional fields. Some of these are actually v2NG, v3 or v4 specific - those are noted below.
+76 WORD flags
This is a 16 bit big endian number containing the following bitfields:
If this bit is set, the appended binary data are in Compute!’s Sidplayer MUS format, and does not contain a built-in music player. An external player machine code must be merged to replay such a sidtune.
This is a v2NG and RSID specific field.
PlaySID samples were invented to facilitate playback of C64 volume register samples with the original Amiga PlaySID software. PlaySID samples made samples a reality on slow Amiga hardware with a player that was updated only once a frame.
Unfortunately, converting C64 volume samples to PlaySID samples means that they can no longer be played on a C64, and furthermore the conversion might potentially break the non-sample part of a tune if the timing between writes to the SID registers is at all altered. This follows from the ADSR bugs in the SID chip.
Today, the speed of common hardware and the sophistication of the SID players is such that there is little need for PlaySID samples. However, with all the PlaySID sample PSIDs in existence there’s a need to differentiate between SID files containing only original C64 code and PSID files containing PlaySID samples or having other PlaySID specific issues. As stated above, bit 1 in ’flags’ is reserved for this purpose.
Since RSID files do not have the need for PlaySID samples, this flag is used for a different purpose: tunes that include a BASIC executable portion will be played (with the BASIC portion executed) if the C64 BASIC flag is set. At the same time, initAddress must be 0.
This is a v2NG specific field.
As can be seen from the ’speed’ field, it is not possible to specify NTSC C64 playback. This is unfortunate, since the different clock speeds means that a tune written for the NTSC C64 will be slightly detuned if played back on a PAL C64. Furthermore, NTSC C64 tunes driven by a vertical blank interrupt have to be converted to use the CIA 1 timer to fit into this scheme. This can cause severe problems, as the NTSC refresh rate is once every 17045 cycles, while the CIA 1 timer A is latched with 17095 cycles. Apart from the difference in timing itself, the SID ADSR bugs can actually break the tune.
The ’clock’ (video standard) field was introduced to circumvent this problem.
This is a v2NG specific field.
If bits 6-7 are set to Unknown then the second SID will be set to the same SID model as the first SID.
This is a v3 specific field.
If bits 8-9 are set to Unknown then the third SID will be set to the same SID model as the first SID.
This is a v4 specific field.
The MOS6581 and the MOS8580 have three notable differences. First, combined waveforms are generally louder on a MOS8580, to the extent that some combinations that are clearly audible on a MOS8580 are completely silent on a MOS6581. Second, the internal DC levels in the MOS8580 are so small that software or hardware tricks must be used to play volume samples. Third, the MOS8580 analog filter has totally different characteristics from the MOS6581 analog filter.
To ensure that music specifically written for one of the two SID versions can be played back correctly, bits 4-9 in ’flags’ are used as stated above.
+78 BYTE startPage (relocStartPage)
This is a v2NG specific field.
This is an 8 bit number. If ’startPage’ is 0, the SID file is clean, i.e. it does not write outside its data range within the driver ranges. In this case the largest free memory range can be determined from the start address and the data length of the SID binary data. If ’startPage’ is 0xFF, there is not even a single free page, and driver relocation is impossible. Otherwise, ’startPage’ specifies the start page of the single largest free memory range within the driver ranges. For example, if ’startPage’ is 0x1E, this free memory range starts at $1E00.
+79 BYTE pageLength (relocPages)
This is a v2NG specific field.
This is an 8 bit number indicating the number of free pages after ’startPage’. If ’startPage’ is not 0 or 0xFF, ’pageLength’ is set to the number of free pages starting at ’startPage’. If ’startPage’ is 0 or 0xFF, ’pageLength’ must be set to 0.
The relocation range indicated by ’startPage’ and ’pageLength’ should never overlap or encompass the load range of the C64 data. For RSID files, the relocation range should also not overlap or encompass any of the ROM areas ($A000-$BFFF and $D000-$FFFF) or the reserved memory area ($0000-$03FF).
+7A BYTE secondSIDAddress
This is a v3 specific field. For v2NG, it should be set to 0.
This is an 8 bit number indicating the address of the second SID. It specifies the middle part of the address, $Dxx0, starting from value $42 for $D420 to $FE for $DFE0). Only even values are valid. Ranges $00-$41 ($D000-$D410) and $80-$DF ($D800-$DDF0) are invalid. Any invalid value means that no second SID is used, like $00.
+7B BYTE thirdSIDAddress
This is a v4 specific field. For v2NG and v3, it should be set to 0.
This is an 8 bit number indicating the address of the third SID. It specifies the middle part of the address, $Dxx0, starting from value $42 for $D420 to $FE for $DFE0). Only even values are valid. Ranges $00-$41 ($D000-$D410) and $80-$DF ($D800-$DDF0) are invalid. Any invalid value means that no third SID is used, like $00. The address of the third SID cannot be the same as the second SID.
+7C <data>
Version 2, 3 and 4 of the SID header ends here. This offset is the start of the binary C64 data. See also ’loadAddress’ for what the first 2 bytes of ’data’ might indicate.
Before the data of a SID file is loaded in memory of a C64, certain addresses and chips must be initialized in order to play the SID tune correctly.
For RSID and PSID files the following address must be set:
$02A6 | depending on the PAL/NTSC flag in the SID file header, it is set to 0x01 for PAL and set to 0x00 for NTSC. |
The default C64 environment for PSID files is as follows:
VIC | IRQ set to any raster value less than 0x100. Enabled when speed flag is 0, otherwise disabled. |
CIA 1 timer A | set to 60Hz (0x4025 for PAL and 0x4295 for NTSC) with the counter running. IRQs active when speed flag is 1, otherwise IRQs are disabled. |
Other timers | disabled and loaded with 0xFFFF. |
When the init and play addresses are called the bank register value must be written for every call and the value is calculated as follows:
if address < $A000 -> 0x37 // I/O, Kernal-ROM, Basic-ROM else address < $D000 -> 0x36 // I/O, Kernal-ROM else address >= $E000 -> 0x35 // I/O only else -> 0x34 // RAM only
The default C64 environment for RSID files is as follows:
VIC | IRQ set to raster 0x137, but not enabled. |
CIA 1 timer A | set to 60Hz (0x4025 for PAL and 0x4295 for NTSC) with the counter running and IRQs active. |
Other timers | disabled and loaded with 0xFFFF. |
Bank register | 0x37 |
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